TAS5733L:Questions about overvoltage and undervoltage

Part Number: TAS5733L

I configure ADR/FAULT as output to see if the chip is overvoltage or undervoltage. When I input 3.3V AVDD to the chip, ADR/FAULT displays as 1, and the chip is working normally, but when I input PVDD After 12V, ADR/FAULT has been switched between 0 and 1. Is this normal or an undervoltage and overvoltage fault has occurred? The PVDD input is 12V/200mA.

  • Hi Zeli,

              As you can see from datasheet, Fault pin must be configured as enable or it's an input pin to detect ADR.

    BRs

    Leon

  • I have solved the problem, but I have another problem. It is stated in the chip manual that TAS5733L can not be connected to MCLK, but in the forum I saw an article saying that TAS5733L must be externally provided with MCLK, otherwise there will be no sound output. Above, I am not connected to MCLK, and the conclusion is that there is no sound output. Can I short-circuit MCLK and SCLK? Let SCLK=48khz*32*2 be greater than 3Mhz to provide MCLK, but the maximum SCLK in the chip manual can only choose 24 bits, how should I deal with it, if MCLK must be required, then why does the chip manual say that MCLK is not required

  • Hi Zeli,    

              If you want to use 3-wire I2S, MCLK and SCLK should be tied externally. It means that I2S only works when SCLK is in the range of 2.8224~24.576MHz.

             If MCLK is not provided, the amplifier’s internal oscillator will generate the internal clock required for the amplifier’s operation. In this operation mode, the amplifier will not stream audio content through the outputs until a valid MCLK is provided. Usually 48kHz Fs and 32bits mode is used, then SCLK is 3.072MHz, which can be also used for MCLK.

              Maybe you can try to connect MCLK and BCLK, then try to provide 24Fs BCLK to see whether device has output. If can't, which means you must need 32Fs BLCK(3.072MHz). 

    BRs

    Leon