Other Parts Discussed in Thread: TINA-TI, LM7705
How do I get the filter design tool to use a single positive supply for a bandpass filter design?
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Hi Roger,
If I understood your inquiry correctly, you want to design an active bandpass filter with the following design tool.
https://webench.ti.com/filter-design-tool/filter-type
Here is what I would do.
1. Use the filter-design-tool above to get the Bandpass performance you want, such as filter's gain, inverting vs. non-inverting, bandpass region, filter topology etc..
2. Once you get the filter circuit you want, you may create a design circuit from the tool above,
3. I will convert the suggested BP filter design from the above, and duplicate and simulate it in Tina-TI.
4. Fine tune the filter with a single positive supply voltage rail and check out the final BP performance.
5. Once you are satisfied with the simulated filter performance, I would build it and verify the performance on a bench or via PCB.
https://www.ti.com/lit/an/slyt549/slyt549.pdf
If you provide me with BP design parameters, I can help it as well.
If you have additional questions, please let me know.
Best,
Raymond
Design Inputs
# Name Value Description
1. FilterType bandpass
2. FilterResponse Bessel
3. FilterOrder 6.0
4. FilterTopology Multiple Feedback
5. NumberOfStages 3.0
6. CenterFrequency 22.0 k
7. StopbandAttenuation -51.146
8. PassbandBandwidth 5.0 k
9. StopbandBandwidth 50.0 k
10. Gain 3.162
11. DualSupply +/-5.00 V Power supply(s) to active chips
12. ResistorTolerance E96 Resistor series - 1% Passive resistor tolerance
13. CapacitorTolerance E48 Capacitor series - 2% Passive capacitor tolerance
Hi Roger,
This is what we have currently. It may need some tuning.
Best,
Raymond
Thanks Raymond,
So I see we created a virtual ground. I do have an 8 volt rail available and I could create a virtual ground between that rail +/- 4 volts. However I need to think on this as the Diseq controller that I am feeding into will be referenced to a system ground. Maybe I just AC couple the output to system ground reference with a series .1uF cap.
Thoughts on that? I guess I am confused as to why I can't do this with a single rail and no virtual gnd.
Kind regards and thanks!
Roger
Hi Roger,
bias the +inputs of OPAmp at middsupply and insert >100nF caps in front of each resistive voltage divider. You might also want to insert such a cap at the output of last OPAmp.
Kai
Hi Roger,
Thoughts on that? I guess I am confused as to why I can't do this with a single rail and no virtual gnd.
It is Vcm bias issues at input of op amps. You may do what Kai is suggested or provide a slight negative voltage rail at Vee, like LM7705 (low noise negative bias generator via switched capacitor charge pump). It may work, at least the simulation indicated that it may work.
Best,
Raymond
thanks - I biased the inputs at VDD/2 and it works nice now. Appreciate the help!!