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LMV358: [Urgent] Has occurred output issue between different lot products.

Michael Jeong1
Expert 2600 points
Part Number: LMV358
Other Parts Discussed in Thread: LMV722,

Hello Expert,

I need your help and quick response after review about below.

Because our customer's production line has stopped.

Their product is running for more 7years.

1. Here is schematic.

    Could you please review and give me comment if there is fault and some issue?

    VCC = 3V

    

2. Waveform

    [CH1 : Pin1  // CH2 : Pin2  // CH3 : Pin3  // CH4 : Pin5]

    DETECT_CLK_IN is clock signal which is generated from MCU for detecting RFID Signal.

    Measured is max. voltage which is the right value of waveform image.

    1) Good part (Date code : earlier than 2042)

        This part was passed on their function test process.

        When I look at this waveform, why is there a spark signal on both sides of clock signal?

        I think that it is weired. But, they tell me that it is no issue.

        Also, amplification of CH3 is almost same to CH4. Why is the no amplication?

       Could you please all of your opinion?

       

        

    2) Fail part (Date code : 2042)

        This part was failed on their function test process.

        Could you please all of your opinion?

        

BR,

Michael

  • 0
    TI__Guru*** 140026 points

    Hello Michael,

    Are all of these waveforms DC coupled? If yes, then the negative voltage input is a problem; it exceeds the common mode input range. 

    This envelope view doesn't tell the whole story. Can we get waveforms zoomed in to the middle so I can see the exact waveforms?  

  • 0 in reply to Ron Michallick
    Expert 2600 points

    Hi Ron,

    Thanks for your quick response.

    When I checked waveform of CH1, I think that is DC coupling.

    Anyway, I will recheck and let you know.

    Also, about zoom in, you mean that zoom in rectangular area of the below?

    Is there no problem on schematic?

    If negative voltage input is a problem, signal level is almost same like CH3, CH4 without amplification?

    If DETECT_CLK_IN is above than 0V, do you think that this issue will be OK?

    Could you please let me know about each question?

    I need your more detail explanation.

    BR,

    Michael

  • 0 in reply to Michael Jeong1
    TI__Guru*** 140026 points

    Michael,

    More zoom in to my white box

    With input below ground, overload recovery time and phase reversal can come into play. One or both of these will be the effect that changed the circuit result. Recently the overload recovery from output low is longer, the recovery from output high is a little faster and phase reversal was eliminated.  

    If input was always positive, then the result would not have changed. 

    What is the full part number used?

  • 0 in reply to Ron Michallick
    Expert 2600 points

    Hi Ron,

    Full part number is LMV358IPWR.

    BR,

    Michael

  • 0 in reply to Michael Jeong1
    Expert 2600 points

    Hi Ron,

    They measured DC Coupling mode on Oscilloscope.

    I'll have to visit our customer tomorrow.

    So I need some information to talk with our customer.

    Pls, send your feedback to me.

    1. Is there no problem on schematic?

        I need your confirm.

    2. I will try to test their B'D to find some problem.

        What kind of tests do we need to do to check if our parts are faulty or not?

    3. Could you give me some advice to clarify and verify this issue?

    BR,

    Michael

  • 0 in reply to Michael Jeong1
    Expert 2600 points

    Hi Ron,

    Here is additional information about DETECT_CLK_IN.

    This clock is made by NFC chip and 13.56MHz.

    The unity-gain bandwidth of our device is 1MHz when I checked.

    I think that DETECT_CLK_IN is out of range.

    If this input condition, Shouldn't this frequency be cutoff or very low output?

    At their waveform, In and Out are almost same.

    Should I have to tell them to change their frequency within 1MHz?

    BR,

    Michael

  • 0 in reply to Michael Jeong1
    TI__Guru*** 140026 points

    Micheal,

    The only reason this worked for seven years, is because the application depends on two flaws of LMV358. LMV358 had phase inversion for pin 5 below (more negative than)  about -550mV. This phase inversion makes output high. The second flaw was that LMV358 VOL (output low minimum)  doesn't go all the way to zero; it remains at tens of millivolts to prevent saturation that would increase supply current. This does help the LMV358 to leave VOL quickly. 

    The high frequency AC input, both positive and negative peaks, promote output high on LMV358 even though the input frequency exceeds the bandwidth of the device. The newer LMV358 devices do not phase inversion and VOL is much closer to ground which is better for most applications, but not this one.

    For the same flaws that may work with this application, you need D or DGK packages to get LMV358-N-Q1 or LMV722. Sorry no PW8 solutions that have both flaws.

    A much faster PW8 might work. https://www.ti.com/amplifier-circuit/op-amps/products.html#p480=2;2&p23typ=50;150&p1261max=4;180&p1261min=0.9;4

  • 0 in reply to Ron Michallick
    Expert 2600 points

    Hi Ron,

    I had a big issue and pressure w/ our customer because of different performance between products of different Assembly and Fab site.

    Our product return and analysis request was declined from your quality team.

    Your quality team said that customer's schematic have to be review from E2E.

    As I mentioned, Input signal which DETECT_CLK_IN is 13.56MHz.

    In other words, this frequency is out of spec. that GBW is up to 1MHz.

    Now I need to get your confirmation whether their schematic has problem or not.

    Could you please send it to me by email (<removed>)?

    BR,

    Michael

  • 0 in reply to Michael Jeong1
    TI__Guru*** 140026 points

    Michael,

    13.56MHz with the first stage gain 1+1k/470 = 3.13 requires an op amp with the gain bandwidth greater than 3.13*13.56MHz = 42.4 MHz.