OPA659: High Speed Peak Detector

Hi Behtan,

looks stable.

Kai

Hi Bethan again,

but keep in mind that the circuit is rather high ohmically at the input. This can cause stability issues. The circuit might need some shielding.

Also, the high input bias current of OPA690 can cause some offset voltage error (12µA x 4kOhm = 48mV).

And don't forget to mount an isolation resistor at the output of second OPA690.

Kai

Hi Kai,

I'll use OPA659 and its input bias current 0.0032µA (max) and I added isolation resistor of 100 ohm to the second opamp output.

About first issue could you tell me how can I be sure that circuit won't cause stability issues. As you can see I am not good at opamps :(  if it possible could you share reference design with high input impedance opamp+shielding ?

Sincerely,

Behtan Umut Mercan

Hello Behtan,

  The circuit looks good to me too. For the resistor at the output of the second stage, Kai is referring to situations where there is a capacitive loading to the amplifier which will happen when measuring with a scope probe. A small isolation resistor of 10 to 50 ohms should "isolate" the capacitance from the output impedance of the amplifier. Also, here is an app note on high input impedance designs.

Thank you,

Sima 

Hi Behtan,

in addition to what Sima said, you could put a cap of some tens of pF in parallel to the 4k resistor. This would heavily decrease the impedance seen by the +input of first OPAmp at high frequencies and would heavily reduce capacitive feedback from the output to the input.

Or do you need to use a frequency compensated voltage divider for some reason, like in an AC volt meter? What is your input signal bandwidth?

Kai

Thank you for your replies Sima and Kai.

I'll send  output signal to the ADC however I think I should put 50R resistor at the second opamp output.

My input signal bandwith is about 200 kHz. For the resistor divider I'm planning to use 1206 or other similar thin film resistors. In this way I can be sure that my signal would not get distorted. If you would like to look at my voltage divider plan, I attached to Tina file below. For 1206 resistor, I estimated that its stray capacitance less than 1 uF. (For stray capaciance modelling I put series inductance and parallel capacitance to the resistors.)

Sincerely,

Behtan Umut Mercan

voltagedividerthin.TSC

Hi Behtan,

100nH series inductance and 1pF parallel capacitance per SMD resistor is a bit too much. See here for typical values:

freqresp-1.pdf

Kai

Hi Kai,

I really appreciate your help. I read your pdf before I gave the higher values in order to be sure. Do you have another comment on the circuit? If not I'll close the thread.

Sincerely,

Behtan Umut Mercan

Hi Kai,

Thank you for your support. I added 10R resistor to the output of the second stage resistor. For the tens of pF capacitor: If I understand correctly, it will improve my stability but I do not have to put it. 

Sincerely,

Behtan Umut Mercan

Hi Behtan,

if you think that the circuit behaves weird, try adding a 47pF NP0 in parallel to the 4k resistor. You could also increase your 10R isolation resistor to 100...200R

Kai

I guess there is no harm to put 47pf . However, when I increase 10R to 100-200R the voltage drop increases.

Thank you again. I've learnt so much amplifier knowledge from you.  (As I observed you are helpful to everybody.TI should give you salary .)

Sincerely, 

Behtan Umut Mercan

Good idea

Kai