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PGA281: Is the PGA281 differential output capable of driving a SAR ADC directly ?

Part Number: PGA281
Other Parts Discussed in Thread: ADS9110, OPA2320, THS4551, OPA2625, ADS8900B, OPA625

Is there a limitation of drivin SAR ADC directely ( kickback, settling , accuracy ).

In my understanding, a ADC-driver needs higher BW to handle the kickback and get good settling times to uV in ns.

Is this achievable with the limited BW of the PGA281 and where are the limitations ?

My focus : high linearity and high accuracy measurements .... possible target ADC = ADS9110

Regards

Franz

  • HI Franz,

    The PGA281 is an instrumentation amplifier optimized for high precision DC applications (low offset, low gain error and low temperature drift) supporting relatively low bandwidth signals.  The small signal bandwidth vs gain is shown on page 9, Figure 16; were the flat frequency region is limited to around ~15-kHz before starts rolling-off.  The device has relative high output impedance over frequency, so it is only able to drive directly a SAR ADC such as the ADS9110 at low sampling rates of only a few ~10s of kSPS (around ~30kSPS). 

    If you require to interface the PGA281 with the ADS9110 to support high sampling rates, it will need to be buffered with a higher BW amplifier that offers lower output impedance over frequency. 

    To support a full-throughput of 2-MSPS, the PGA281 may need to be buffered with a high-speed fully-differential amplifier such as the THS4551 or a dual amplifier such as the OPA2625.  Another possibility, the OPA2320 (dual, 20-MHz amplifier) can drive SAR ADCs such as the ADS89xxB (20Bit or 18-Bit SAR) at a sampling rates up to 1-MSPS.  Attached is a previous design with the PGA281+OPA2320+ADS8900B (20-Bit) supporting 1-MSPS maximum sampling rate that could also be of interest. 

    ADS8900pga281E1(001)_Sch.pdf

    If you would like us to provide the analysis of one of these PGA281+Buffer circuits driving the ADS9110, kindly let me know the maximum sampling rate required and I can provide a few options/simulations driving the ADS9110.  

    Thank you and Regards,

     Luis

       

  • Hello Franz,

    Below is an example of a THS4551 that can connect directly to the PGA281 differential output to drive the ADS9110 at 2-MSPS. The circuit is configured in a Second Order Low-Pass Filter (Butterworth) with a corner frequency of 50-kHz.  We can adjust the filter per the Customer requirements.

    Below is a TINA simulation result of the THS4551 Filter driving the ADS9110 at 2-MSPS, settling within 1/2-LSB of 18-B resolution (Settling error within ~3uV error).  Also attached is the simulation file.

    TINA Simulation File:

    THS4551_ADS9110_transient_filter2_Nov_7_2021.TSC

    We could modify the file per the Customer requirements.  Also, using OPA625 is a another possibility.

    Thank you and Regards,

    Luis

  • That is a pretty nice file Luis, 

    I took the core MFB with the THS4551 and did a little more work here to improve the SNR, the RC values do not give what you say above, but also easy to fix, 

    Had a lot of trouble with the 2016 model returning irregular circuit errors, going to 2019 update fixes that, but I know that model is not resonant enough on the open loop Zout, 

    SAR driver ckt with MFB tuning with THS4551.docx

    Here is that last file, with updated RC and 2019 model update, 

    THS4551 filter portion of SAR driver improved RC.TSC

  • HI Mike,

    Actually, the original post, (post left unedited/unchanged), the figure on the top shows the intended and correct filter, with Cf1 = Cf2 =1nF (not Cf1=Cf2=470pF) providing the Butterworth characteristic with 50-kHz BW. There is however a discrepancy on the figure at the bottom ADC sample-and-hold settling simulation figure/file, where I posted a figure/file with a erroneous circuit with Cf1=Cf2=470pF.  The filter with CF1=Cf2=1nF shows the correct corner frequency pf 49.3kHz with the 2019 THS4551 model and drives the ADC at 2-MSPS without any issues. 

    Filter Simulation file:

    THS4551_AC_filter__Nov_7_2021.TSC

    The noise of your circuit at 200kHz is about ~6.71uVRMS vs the posted circuit above with Cf1=Cf2=1nF is around ~6.42uVRMS so noise performance is close or similar on both.  In any case, the noise for this this circuit is expected to be heavily dominated the PGA281 input stage; and the subtle difference may not be significant.    

    Regarding the model versions, it appears that when the high-speed team updated the THS4551 TINA model in 2019, many of the posted datasheet circuit examples advertised on the THS4551 landing page for download, they still show the original 2016 model,  therefore I will need to provide the feedback to the high-speed regarding the model discrepancy on the example files; it should be easy to quickly update the files with the correct model to avoid this confusion.  

    However, I do appreciate letting me know about the inadvertent discrepancy on the bottom figure with the ADC, but the intended filter posted on the first figure shows the correct capacitor Cf1=Cf2=1nF.  

    Thank you and Regards,

    Luis

  • Ok, here is a 50k butterworth with lower R's, If I run an integrated noise through 200kHz, I get 4uV

    And here is this file, 

    THS4551 filter portion of SAR driver Butterworth improved RC.TSC

    If I change the RC back to the top circuit with the 1nF, I get 5.7uV which is about the delta I would expect (I just look at this as free noise improvement, but yes the earlier stage will dominate), Not sure what you were doing, 

    When I was doing all those circuits to validate the THS4551 datasheet examples, they did ask me to make those available to post as linked to the datasheet - seemed like a good idea but I did wonder who was going to maintain that downstream - no one apparently and this idea did not propogate much further. 

  • HI Mike,

    Yes, your last modified file posted right above with the updated 50-kHz filter now shows a noise improvement from 4.063uVRMS @200kHz. The one on the post three hours ago was slightly different with the 6.7uVRMS closer to the original 6.4uVRMS.

    Respectfully,

    Luis

  • My earlier file was implementing the higher Fo and Q=1 matching the shape in your original attached file with incorrect feedback C, so yes more integration bandwidth = higher noise - dropping back to match the 50kHz Butterworth is a better comparison and incrementally lower integrated noise. 

  • Hi Mike,

    Thank you for the latest file with the 4uVRMS noise.

    The THS4551 is preceded by the PGA281 gain stage.  As I have mentioned, the noise is heavily dominated by the first gain stage and the total noise of the signal chain is just about the same for both circuits.  When using the PGA281 on G=32, the total output noise of PGA281+THS4551 is 175uVRMS vs 177uVRMS @200kHz.

    See below.

    TINA simulation files:

    PGA281_THS4551_circuit_noise.zip

    Cheers,

    Luis