Hi team,
Could you give me comment on following customer question?
Q1. Is it correct that maximum internal offset voltage is 16mV, which is derived from VIO,max = +/-8mV?
Best regards,
Takeshi Sasaki
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Hi team,
Could you give me comment on following customer question?
Q1. Is it correct that maximum internal offset voltage is 16mV, which is derived from VIO,max = +/-8mV?
Best regards,
Takeshi Sasaki
An offset of ±8 mV means that the comparator might output high even if IN+ is 8 mV below IN–, or that it might output low even if IN+ is 8 mV above IN–. These two cases do not happen at the same time, or with the same chip.
Please note that the hysteresis is typically larger than the offset. In the worst case, you need a difference of 8 mV + 14 mV = 22 mV to switch the output.
Sasaki-san
Thanks for your post on E2E. It is true that the VIO range is +/-8mV and Clemens's summary of how to interpret VIO is correct. Likewise, Clemens mentioned that this device has internal hysteresis included. This means that the input signal must overcome both offset and hysteresis before the output will change states. In the case of the TLV7021, the hysteresis can be as large as 14mV. Hysteresis is defined as the difference in threshold from switching low to high and high to low. So with a hysteresis level of 14mV, this means an additional 7mV is needed on the rising edge and falling edges in order for the output to transition. For a worst case offset of 8mV, an additional 7mV (max hysteresis spec divided by 2) is required for a low to high transition. Similarly, for a high to low transition, for a worst case offset of -8mV, an additional -7mV could be required. So the maximum input requirements for the TLV7021 would actually be +/-15mV.
Clemens
thanks again for your continued excellent support of the forum.
Chuck