Jonathan,
We discuss this topic in depth in the app note located here, and then build with this information into ADC input stage design with CSAs here (the device used in this document is actually the INA293). These should provide some helpful background, but the goal is, in summary, attempting to alleviate any second order poles from forming in the combinatory response formed between the output impedance and the load impedance of the capacitor. If we look at the output impedance for the INA293:
You can see that the maximum impedance is <100Ω, so this provides confidence that an isolation resistor of 100Ω should be enough to isolate effectively any amount of capacitance from the output stage. Of course, the low pass filter formed will affect the settling response as per the cutoff frequency.
