OPA277: Improved Howland Current Source switching C-R load - howto protect the OPAMP from floating output / stability

Marek. Really grateful, I appreciate it a lot. Thank You so much.

I was editing my post adding TINA-TI schematic when I saw yours: here it is:

Improved HCP_OPA277-Both_phases.TSC

You are completely right. My fault not to have seen before the return path when load disconnected. Sorry

What happens to the OPAMP output if, due to increasing blocking capacitance, the DC Block is not fully discharged? I mean often in reality you have to put a switchable bank of selectable 1uF - 11uF - 21uF capacitor that often reaches, after a initial transient, stabile charged/discharged values. The important is that the net charge that passes back and forth on the load is equal to zero. Please see here a simulation of a 21uF cap:

So we are in ground phase: both outputs of the OPAMPs have reached their Vout swing max.  U1 is saturated since V+ not equal to V-  (half a volt difference).

During the next pulse phase the opamp sees at its output a semi-loaded cap. Does it really matter?

If we suppose that the wires that connects to the sensor and the traces of the PCB could have an inductance of 100uH could this leave to instabilty?

How can I simulate it?

For the part regarding AC analysis I have new born questions but I want to study by myself before asking dumb/obvious questions. Sorry for the long post.

and thanks again.

Stefano

Hi Stefano,

I see VU1 and VP2 being at about 14V all the time. So why are you using a Howland current pump?

Kai

Stefano,

I believe the whole idea behind using Howland pump is to control the current charging the DCBlock cap so together with the timing of Vpulse/Vground clock you can achieve desired steady state voltage across the cap.  With VDAC of 10V the output voltage across Rshunt is 1V, which fixes the output current AM1=1V/20ohm=50mA  - see below. Even if the OPA277 could deliver the 50mA (which it cannot since Isc is 35mA), this would drive the VLoadC to 25V (50mA*500ohm).  Thus, in order for the circuit to work linearly VU1 would need to be able to go to 25V+1V=26V (unlikely on 15V supply).  

All of this causes OPA277 to saturate at the positive - see below Vout at 13.96V and AM1 current of 26mA instead of 50mA. 

All of these cause ILoad to decrease over time resulting in a non-linear charging of V_DCBlock cap - see below.

Therefore, in order to assure that the circuit works linearly, you need to decrease VDAC or increase Rshunt. Using Rshunt of 100ohm results in a constant ILoad current of 10mA during Vpulse - see below.

Running transient analysis confirms a constant 10mA ILoad charges DCBloack cap, thus resulting in a linear voltage change across it - see below.

Increasing the DCBlock cap to 21uF while using Rshunt of 100ohm results in the steady-state voltage across it of 1.48V - see below.

All in all, you need to decide what the end goal here is and accordingly modify the circuit in the way that it meets the timing needs while operating linearly - you cannot allow tOPA277 output to get within 1.5V below its rail.  This is the only way to make sure that the results will be as predicted by the simulation.

Improved HCP_OPA277-Both_phases ML.TSC

Ciao Stefano,

I have another question:

Why so complicated with the DCblock capacitor in series with the sensor? Why not just using a Howland current pump sourcing a simple and harmless DC current? Or even using only a simple reference voltage in combination with a suited current limiting resistor?

Kai

Hi. I really appreciate the way you nail down all the critical aspects I cannot see yet. That helps me deconstruct all my wrong believes in order to build a solid understanding. Thank You.

That said let’s go in order.

1. The choice of a Howland current pump that Kai asks (thanks for your support even in the other post), is that it is a popular high performance, voltage-controlled current pump, which can both sink and source precise amounts of current and provide high output impedance as well as high frequency bandwidth.

One main requirement of the testing facility is to achieve a “pulsed” current injection in the -35mA to 35mA range over a load that can vary its resistance during test from 400 to 1,5k (manly it is 500 ohm) still requiring a constant current.

So that’s why my original idea was to steer the HCP through a DAC by digitally controlling a negative/positive voltage applied on its input (let’s for now neglect the OPAMP saturation problem for the OPA277).

Choosing a high current OPAMP like the OPA551, or the new OPA593 as Kai and Thomas suggested here could resolve this issue with the cost of adding a higher supply voltage and use of high voltage multiplexers and analog switches.

Otherwise I could choose a 0-35mA range and literally switch and reverse the load with an H-bridge. This is an option and that could also help me with the 100V total compliance voltage problem but it also opens a bigger scenario adding more complexity to the circuit.

2. The use of a DC Blocking capacitor aims to perform what’s called the Charge Balancing Process: principally, whenever current during the test is conducted over the load immersed into a conducting solution, chemical processes take place at the interface. By applying a large potential (that can reach as seen 100 Vpp) over a longer period of time, charge is massively exchanged over the electrode and strong currents flow which cause electrolysis, pH change, electrode dissolution. In order to avoid these irreversible electrochemical reactions, the stimulating current pulse is typically balanced and biphasic, which ensures that no net charge appears at the electrode after each stimulation cycle and the electrochemical processes are balanced to prevent net dc-currents. That’s why a sink/source current generator is needed that pushes and pulls same amount of current; but in reality 1%-5% of mismatch of the current pulses has to be taken into account so he most common solution is to insert a large, dc blocking capacitor in series with the stimulation electrode, which guarantees that no dc-currents can flow to the electrode over time. Nonetheless, regular discharge of the blocking capacitor is necessary in order to avoid saturation due to dc-current integration and consequently reduced output voltage compliance of the stimulator.

By the way is there a real method to get rid of these current spikes?

Now regarding the AC stability I have following questions ( sorry for the verbiage...):

1. Using the OPA277 (builtin in TINA-TI) and the OPAx277 (Reference Design based on Green-Williams-Lis Pspice simulation model) TINA-TI models led me to different bode plots:

OPA277

OPAx277

Which one should I take it for references? I suppose the latter one since the OPA277 just gives me a 90 degree phase margin - too generous to be true I think.

2.In your simulation You provided NOT considering the Rload of 500 ohm, did you put yourself in the worst case scenario (also lower phase margin)? I mean adding the Rload in series, would only result in increasing the Aol beta frequency by pushing the pole further away in frequency since the canceling zero formed by (Rshunt || DCB) remains there?

3. By simply changing the Rshunt resistance value from 20 to 100 in your simulation I noticed that the phase margin for Rshunt = 20 ohm lays on a flat curve while the other on a steeper curve: does this means that it could potentially lead to more instability?

Is the goal to tweak the external component values in order to let it stay on a curve as flat as possible? 

4. I wanted to investigate how stability is affected by the change of the DCBlocking value so I swept it. Why in the world are the Bode plots apparently similar using a sweep of DCBlocking caps from 1uF to 21uf at least one order of magnitude different one from another? Shouldn't at least the zero change?Am I missing something?

Here the simulation I have used:

Improved HCP_OPAx277-AC Stability_Rs100-Rl500-DCB1sweep21u.TSC

I honestly am really sorry for all this questions, so much open questions in my head... hope you all won't get bored..

Thank You again.

Sincerely

Ciao Stefano,

no reason to apologize. Solving tricky problems is just fun 

Kai

Hi Stefano,

Stefano Alfredo La Spina said:

2. The use of a DC Blocking capacitor aims to perform what’s called the Charge Balancing Process: principally, whenever current during the test is conducted over the load immersed into a conducting solution, chemical processes take place at the interface. By applying a large potential (that can reach as seen 100 Vpp) over a longer period of time, charge is massively exchanged over the electrode and strong currents flow which cause electrolysis, pH change, electrode dissolution. In order to avoid these irreversible electrochemical reactions, the stimulating current pulse is typically balanced and biphasic, which ensures that no net charge appears at the electrode after each stimulation cycle and the electrochemical processes are balanced to prevent net dc-currents. That’s why a sink/source current generator is needed that pushes and pulls same amount of current; but in reality 1%-5% of mismatch of the current pulses has to be taken into account so he most common solution is to insert a large, dc blocking capacitor in series with the stimulation electrode, which guarantees that no dc-currents can flow to the electrode over time. Nonetheless, regular discharge of the blocking capacitor is necessary in order to avoid saturation due to dc-current integration and consequently reduced output voltage compliance of the stimulator.

I fully understand that you don't want to have net DC current flowing through your sensor because of the danger of starting chemical processes. But this is exactly what happens during the charge-up period of your "DCblock" capacitor, at the begin of your measurement.

Wouldn't it be better to drive a true AC current through the sensor? You can still add a "DCblock" capacitor to prevent longer lasting DC currents from flowing through your sensor in the case that the measuring scheme runs faulty.

You would have to drive the input of Howland current pump by a true AC signal (symmetrical square wave) then.

Kai

No words to say thank You so much. You have made bright light in the darkness of my voyage...

Grazie

Kai. You were right. I did not think on such a issue. Infact running a simulation with a dummy load attached mitigated the issue on output of opamp and solved them on the load (totally disappeared).

I was also thinking, since I need to get sink & source phase and so provide negative and positive voltage, to feed the opamp with a square wave in phase with the one I use to switch to ground the load. Theoretically during ground phase the opamp should have 0V on his input so it does not saturate.

With a perfect timing I should overcome this even if I have to study the slew rate...

Thanks again

Hi Kai.

Thanks for pointing this out.  Hope I understood what you said, see if it's the case. One single test can usually last for weeks/months. Once fired there is no need to stop them and let the capacitor reach again the steady-state voltage level that is reached in less than 25ms causing a net charge to reach the load.

Once the test has ended the dc capacitor is completely discharged.

When you say "drive a tue AC current" do you mean driving the load with the two phases (sink and source) in which the current flow first in one direction and then the other?

Best regards

Marek.. I have one last question (Doh..) hope you have already some patience left.

I wanted, in order to close the circle, to solve the real-world issue regarding the compensation for parasitic input capacitance at the inverting opamp input using a feedback capacitance. I have followed the part 6 of the op-amp stability series. I have tried to get some results by adding the CF capacitance that I have calculated to be approx 60pF but I don't know again where to break the loop on the inverting input.

I am getting horrible bode-plots as shown below. have already tried for a couple of hours without effort.

Could you please help me nailing it down? I would appreciate it.

Improved HCP_OPAX277-AC StabilityMultipleFBLoop.TSC

My goal is to implement the lead-lag compensation at the input terminal of opamp1 since I have seen this is a common in howland topology.

Thanks again alot

Thanks for pointing this out, for the patience and for everything... "I have no more question your honor!!!"... ;-)

Hi Stefano,

Stefano Alfredo La Spina said:

When you say "drive a tue AC current" do you mean driving the load with the two phases (sink and source) in which the current flow first in one direction and then the other?

Yes, exactly.

Kai

Stefano,

As you've been coming out of the dark tunnel, we were hoping here for a bit more of your engineering poetry - it made our day!  And Kai, as always, thank you for your chemical processes expert inputs!

Marek , Your words heartened me... I was really afraid to get banned out from the forum for too much unresolved questions...with great pleasure, I exchange it.. just please lend me for a while some of your huge and deep knowledge and conceptual clarity... would made my life easier... :-)

Kai has helped me also in the previous post, thanks!

But don't be afraid You (and Kai) ....

I'll be back (in the dark tunnel - asking for some more help!!!) Soon! ;-)

Ancora grazie mille e complimenti

Stefano

Thanks Kai. Will do that, and let you know how's going during measurements