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INA821: How to choose an LDO for the INA821 with a single supply

Part Number: INA821
Other Parts Discussed in Thread: TPS7A47-Q1, ADS1256, REF5050

I have an INA821 instrumentation amplifier, he said his output noise at 0.1-10Hz is 2.5uV (assuming the input signal noise is lower than 2.5uV), I use a single supply of 10V to the INA821. So should I choose an LDO with less than 2.5uV noise?
Or does the power supply noise actually not affect the noise at the final output of the instrumentation amplifier?
What kind of LDO should I choose to achieve the performance of INA821?

P.S.My input signal is between 0.5-20hz
  • Hello,

    What kind of LDO should I choose to achieve the performance of INA821?

    If you are looking for low noise LDOs, you can check out the our LDO site. Since I do not know your input and output voltage ranges I am not applying filters to narrow down the selections.;15&sort=p1128;asc

    Typically, you would prefer to use series linear LDO regulator for low noise application. However, INA821 has an excellent PSRR in low frequency as shown in the captured image below. So the selection of LDO is not very critical, but TI does have very wide selections of LDOs that you may use for the application. 

    For instance, assume an INA921's  power rail has 10mVpp noise at 60Hz at its power rail input; and assume INA821 is operating at Gain = 100V/V with PSRR_min = 130dB. The effect of PSRR at the output is insignificant at approx. 10mVpp/ 10^(130dB/20) =  3.2nVpp; the max. approx. voltage ripple will be seen at the output of INA821 per the example.  

    If you have additional questions, please let us know. 



  • Thank you very much for your reply.

    Sorry for forgetting to add, my input voltage is 12V, and the output is 10V and more than 100mA (thanks for your hint, I think I know how to find LDO).
    I'm not too sure about the calculation of PSRR.
    Assuming the frequency is 10Hz, now I use a TPS7A47-Q1 LDO and according to Figure 1 the noise is about 7.5uV at 10V output.
    Then the PSRR of INA821 is about 120db when G=1. Figure 2

    Therefore, according to the calculation, the final noise that the TPS7A47-Q1 LDO affects the output of my instrumentation amplifier is shown in Figure 3.
    Am I correct in thinking?

    Figure 1.

    Figure 1

    Figure 2.

    Figure 2

    Figure 3.

    Figure 3.

  • Hi,

    please post a schematic to see what you do with the REF pin of INA821 and where else the supply voltage coming from the LDO enters the signal chain.


  • Hi Tingwei,

    My guess is that you are interested to calculate the total noises of INA821 for low frequency application (0.5-20Hz). As Kai is suggested, it will be better off to upload your schematic rather than we are speculating what you are trying to do.  

    When you are discussing noise, you need to watch out the units and frequency ranges etc.. The PSRR measurement techniques are slightly different between LDO and Op Amps, even though the PSRR has the similar meaning.  

    The 7.25uVrms noise in TPS7A47-Q1 LDO is integrated from 10Hz to 100kHz. So we need to know what is your application's frequency for the LDO and INA821. I am fairly sure that your LDO's LPF will be limited to 100Hz-1kHz range or lower. 

    For INA821 IA, the image below is Vnoise and Inoise spectral density noise figures. Assumed that Vnoise noise and resistor noise are the dominated variables in your design, we need to know the operating frequency range in INA821 so that we can estimate or simulate the total noise per the application. 

    Based on the PSRR figures of 120dB-140dB range in INA821, I do not believe that LDO's noise will be significant in your application (0.5Hz-20Hz). You may eliminate or ignore the LDO's noises due to INA821's power rail (per your LDO selection). However, we'd like to know how the LDO is used elsewhere in the INA821's configuration, perhaps we can provide some additional suggestions. Please provide us the schematic, application and/or design requirements. 

    I'm not too sure about the calculation of PSRR.

    Enclosed are links for your references.,PSRR%20value%20is%20in%20decibel.,PSRR%20value%20is%20in%20decibel



  • hello~thanks for your reply
    The following is my schematic diagram. My signal end is a sensor with two opposite signals. I want to use common mode to suppress noise to increase the dynamic range of the sensing.
    The signal is 0.9V referenced to +-0.2V per unit value.

    The noise of this sensor is about 2*(10^-4)V, we want to remove the common mode noise to reach 4*(10^-6)V.

    We mainly measure the signal range from 0.075-20Hz and use the ADS1256 for 200Hz sampling.

    I am very sorry that there is no way to publicly state which sensor it is, because we are doing academic research on new technologies, sorry.

  • Thank you for your very professional reply, the schematic has been replied in other posts.
    I will read the information you gave in detail and wish you a good day.

  • Hi,

    there are at least three error terms:

    1. The power supply voltage noise,

    2. the common mode noise coming from the sensor or bridge and

    3. the reference voltage noise of VS3 being connected to the REF pin of INA821.

    All these errors terms must be calculated individually.

    Keep in mind, that the power supply voltage noise is suppressed by 130dB at a gain of 10V/V. So only a very small portion of the supply voltage noise is introduced into the signal chain. But the reference voltage noise at the REF pin is introduced into the signal chain without any suppression!


  • OK, I understand~ I forgot to change the REF pin to REF5050 connection~
    I'm very sorry for giving a very wrong circuit, I will revise it according to the error you put forward, and I will raise it again if I have any questions. Thanks again for your reminder and reply, and have a nice day.

  • Hi,

    there's another trap:

    The common mode rejection of INA821 is huge for balanced source impedances, 120dB at a gain of 10V/V. And in your frequency range of up to 20Hz the common mode rejection would even be very high with a certain imbalance of source impedances. See figures 17 and 18 of datasheet.

    But keep in mind that in a bridge configuration any imbalance of leg resistances can fully ruin the common mode rejection. With one leg differing in resistance by only 1% relative to the others, any noise of the bridge's voltage will be turned into a differential signal only being suppressed by 52dB. The bridge's voltage is no longer introduced into the signal chain being suppressed by the ultra high common mode rejection of INA821 but by a way smaller suppression factor, 52dB in the example:

    And because the common mode noise is turned into a differential noise by the imbalance, it cannot be eliminated anymore. It has become an unwanted part of the signal.

    The same is true for low pass filtering in a bridge. Any imbalance of filtering caps can fully ruin the common mode rejection of INA821. So it's wise to keep the corner frequency of common mode signal low pass filtering at the input of INA821 rather high to only prevent the INA821 from demodulating EMI arriving the inputs.

    You should also consider installing anti-aliasing filtering at the input of ADS1256.


  • ok thanks for the reminder, i will try to fix the circuit~ thank you