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INA290: IN+/- bias before Vs rail power up

Part Number: INA290

In an application I am working on, we are trying to sense the current seen on 54V but the Vs to the device will be more like 12V or 5V which will come up later on in the power sequencing.

Is there any concern or issue with having V+/V- sense pins seeing having applied voltage to Rsense before Vs is powered up?



  • Hello Jeramie,

    I just had a similar question today.  Same reply.

    Normally you just have to worry about the inputs with respect to GND due to our input structure.  I have seen problems when the VS pin is floating on other devices while there is a transition at the inputs.  Normally at power up with capacitors to GND that is enough to hold the voltage at 0V during before the power up sequence happens and would not be considered floating.  You can see we have IB with VS = 0V and we do not have issues with that.