Ultra high gain (1G...25G) dc-coupled transimpedance amplifiers - how to push the speed?

Hi Stefan,

the simplest way would be to decrease the feedback resistor. The loss of transimpedance could be compensated by the adding a second gain stage then.

Decreasing of the feedback capacitance, on the other hand, which would also increase the bandwidth seems to make no sense here as the feedback capacitance is already very small and cannot be furtherly decreased all too much.

Another option is to use the T-network. Something like this:

stefan_tia.TSC

Kai

Hello Kai,

thank you very much for your suggestions.

Well, reducing the gain in favour of a second stage amplifier is one practical solution, of course.
In practice this introduced some nasty dark-offsets behind the second stage due to single supply design.
The dark offset of the TIA stage is in the range of 100µV with OPA291, but after the second stage was up to 2mV.
Maybe I did not chose the best opamp (OPA314, OPA172) for the second stage?

The T-network approach is of-course another good hint.
I already employed that for "minor" transimpedances such as 0.1G to 1G to reduce the value of the resistor just to be able to get a better resistor in terms of smaller temperature coefficient (try to get 25G in 0603 with a decent TC).
With this approach the noise in fact increases by the factor the Rf is reduced, which may or may not be a problem.
One interesting thing I also noted was an increased tendency to oscillations as long as the feedback capacitor was positioned as in your schematic. The exact reason why it tended to oscillate was unclear, maybe stray capacitances in the PCB. But if we moved the feedback capacitor back such that it goes directly from opamp output to negative input the device returned to stable operation.

Just as a side note: the complete circuit resides on a circular PCB of just 7mm diameter :)

Hi Stefan,

Stefan Langer said:

Well, reducing the gain in favour of a second stage amplifier is one practical solution, of course.
In practice this introduced some nasty dark-offsets behind the second stage due to single supply design.

The LM7705 can help and allow the output of OPAmp to fully go down to 0V.

Stefan Langer said:

With this approach the noise in fact increases by the factor the Rf is reduced, which may or may not be a problem.

Correct. This is the disadvantage of the T-network.

Stefan Langer said:

One interesting thing I also noted was an increased tendency to oscillations as long as the feedback capacitor was positioned as in your schematic. The exact reason why it tended to oscillate was unclear, maybe stray capacitances in the PCB. But if we moved the feedback capacitor back such that it goes directly from opamp output to negative input the device returned to stable operation.

The schematic I presented is highly simplified. Of course, a phase stability analysis would have to be carried out.

What are the exact values of your circuit when using the T-network?

Stefan Langer said:

Just as a side note: the complete circuit resides on a circular PCB of just 7mm diameter :)

And this without getting help from Ant-Man...

Kai

kai klaas69 said:

What are the exact values of your circuit when using the T-network?

Here one example which uses digital pots for amplification adjustment.
If one places the 100pF only parallel to the 1000M it gets happily unstable because of all the stray capacitances of the digital pot.

But even with discrete resistors instead of the left digital pot the stability was in practice better with the capacitor directly between opamp output and input.

As you said, LM7705 is a great addition to get rid of single supply zero-value-issues.
We tend to using it more often (and have trouble sourcing it in the moment :)

I cant edit my post. But for 1000M there are 10pF, and for 10M there are 100pF, to get the right relations

Hello Stefan, 

    As you said, the digital pot will add stray capacitance. A few questions:

1. Is a fixed gain acceptable? 
2. Is design space constrained? Multiple stage design might be easier. You mentioned the single supply design requirement, is dc biasing a possibility for your design? 
3. How much increase in speed are you looking for (rise time range)? 

Thank you,

Sima 

Hi Sima,

1. fixed gain is acceptable, in fact the original intention also (the variable gain thing arose in a side discussion)
2. design is constrained to PCB of 7mm diameter, the photodiode takes 1.5x1.5mm of that in the centre.
   => so yes, extremely constrained in my opinion.
   DC biasing is an option but due to space constraint unrealistic IMO.
   A split supply indeed is far simpler to implement. Actually I did that already, but hoped to have overlooked ideas that work with single supply (single supply means 3-pin component, while split supply required 4 pins.)
3. Any speed increase is welcome, may it be 10% or 50%. I'd consider reaching half the current rise time a major improvement.

So if there is an idea requiring split supply - let me know

DC biasing and double-stage design would be possible only with unpackaged dies (we started 15 years ago with bare die hybrid, but switched to packaged opamp because of availability and choice). Unpackaged dies suffered from complicated glob-topping...

This illustrated the space constraint a little. Shown is the PCB, as well as an SC70-5, 2x 0603 and 1x 0402 components.
Just as an example - should not limit ideas for now - for instance passives could get smaller when going from reflow soldering to glue/wire bonding... maybe up to 8 passives can fit together with the SC70 which I consider as set.

I have tested also smaller wafer-scale packages but most variants of them have been found to let light onto the internal die - which produces the funniest malfunctions one can imagine.

The signal photo currents are small (pA-nA-range and at the same time visual stray light is intensive (100klx).

Hi Stefan,

what OPAmp are you planning to use?

I made some simulations with the TLV9001 and the results are looking good so far.

Kai

Do the models you are using properly describe the bias-currents (over temperature)? Getting a design working at room temperature is good, but getting it working over 0...85°C or even -25°C...125°C without too much deviations is the thrilling challenge.

Already in practical use are LPV521 and OPA391 so far, with great results in terms of temperature stability. Lets consider the OPA391 as reference device.

I achieved around a total TC of the complete stage with photodiode of 300....900 ppm/K with 3G of transimpedance. The major contributions arise from the feedback resistor and the photodiode itself (as far as I know). Deciding how much influence the bias- and offset currents actually have is a bit difficult.

For TLV900x there are no over-temperature-range/max-ratings for input offset and bias currents given, and typical values of 2pA can be considered as "not so good" compared with other opamps.

If you compare TLV9001 with OPA391 you find the typical bias- and offset currents two orders of magnitude smaller and given maximum ratings of only 30pA at 125°C. That outperforms the TLV9001 in any aspect for ultra low currents. I'd suspect the TLV9001 would have a bias current max. rating at 125°of somewhere near 1 nA.

Thank you very much, Kai.

I'd definitely should take a closer look into TINA. Switchercad was less distinctive here....

Would you mind sharing the above TINA file(s) as a starting point?