I have designed a circuit with TLV6710DDCR IC to control the charging cycle of a coin cell battery MS621FE. The resistor combination has been chosen to meet the target voltage of Vmon(OV): 3.01V and Vmon(UV):2.01V (R1: 604K, R2:49.9K, R3:100K, RP1:10K) considering IDD=4uA. The Vmon(OV) is happening as per the calculation (Getting logic low OUTA&OUTB at 3.01V input) but there is an issue with Vmon(UV) instead of getting logic high at 2.01V it's happening at 2.91V/2.92V.
Post that assumed the current consumption of 4uA selection might cause the issue, the calculation has been revised with (R1: 240K, R2:20K, R3:41.2K, RP1:50K) considering IDD: 10uA (max IDD as per datasheet 11uA) to meet the target voltage of Vmon(OV): 2.92V and Vmon(UV):1.96V but the same issue is repeating with Vmon(UV), instead of getting logic high at 1.96V it's happening at 2.91V/2.92V.
I'm attaching the schematic for your reference, help to understand the problem and to get the right combination resistor to meet the target values Vmon(OV): 3.01V (logic low on OUTA&OUTB) & Vmon(UV):2.01V (logic high on OUTA&OUTB).


thanks
Narendraprasath




