LMH6551: Request for schematic review

Morning Andrew, 

1st of all, what is your signal source impedance coming into this stage, your input impedance is quite low right now you know, I get about 31ohm input Z and a gain of 0.69 but really need that source R to be sure. 

Looking forward, 

1. Sure you don't want to use a much more modern device like the THS4541 (could maybe do that on single 3.3V supply only)

2. A lot of times I will do a differential 2nd order RLC filter into the ADC from the FDA. You have a single pole 95MHz right now, could sharpen that up quite a lot with 2nd order and lower the integrated noise, 

Hi Michael,

• The input impedance is 50 Ohm
• I have updated the design with THS4541
• With L = 2uH and C = 5.6pF, the Fo is about 50 MHz, which is the target bandwidth.
• I used TIDRA51.pdf as a reference, and followed sbaa108a.pdf to compute the RLC filter design (both of them are attached here as well).

Could you take another look at the filter design (Sheet 14)?

Appreciate your support.

Regards,

Andrew

FIBERSENSE_V1P10.pdf

TIDRA51.PDF

sbaa108a.pdf

Thanks Andrew, that was a big step forward, gave me a chance to run through a few things I used to do regularly, I think I had published a whole string of backgound articles on this flow while developing it at Intersil - if you want to get buried in detail, I can look for those articles, A lot of that cumulated in this very thorough (and fully working) ADC + FDA+ Filter demo board, this one was comm oriented with balun inputs - the output stuff is a precursor to what I have shown you here with lots of other cool things involved, this I think is still the lowest HD lowest power through 100Mhz interface + adc. 

https://www.renesas.com/us/en/document/mat/isla214p50-55210ev1z-user-guide

Attached is the redesign work for you, 

Some redesign work on the ADC32J25 interface with the THS4541.docx3247.60MHz differential RLC filter.TSCMatched input Z THS4541 ADC driver plus 60MHz filter.TSC

Hi Michael,

I have updated the schematic according to your recommendation (Sheet 14)

Could you review?

Now I know how to design a filter for ADC.

Thank you so much

Andrew

FIBERSENSE_V1P13.pdf

Oops, updated the L.  I used a high resonance inductor from Murata.  I wanted to use 0402.  It seems Coilcraft is a bit larger.

Here's a link to the Murata inductor

https://www.digikey.com/en/products/detail/murata-electronics/LQW15CAR11J00D/5415387?s=N4IgTCBcDaIDIEUDqBGArAYQIICUUoCkAGIgERAF0BfIA

Below is the entire schematic.

The THS4541Q circuit is on Sheet 14, and the ADC is on Sheet 15.

Please let me know if there is anything that needs to be addressed.

Regards,

Andrew

3326.FIBERSENSE_V1P13.pdf

I am sure that is fine, I also was using those coilcraft ones since they had 2% tolerance available - better balance there on each side will help to keep CM generation down - that is a larger topic than I can take on right now, maybe someone else can run monte carlo on your filter and show output CM signal. Might not be a big issue, 

As I got further and further into that ISLA demo board development, I also decided it was useful to de-Q the sampling edge on the clock, may not apply here, but may not hurt either to have places for these elements, but I was trying to deliver -100dBc HD levels at 100MHz - so everything mattered - in pulse oriented, not sure it matters as much. 

But, 

1. right at the ADC input pins, add 10 ohm R's

2. Split a little bit of the diff filter C off into C's to ground to shunt the sampling edge off into ground. So say you put 10pF just on the other side of those 10ohm elements at the ADC input to ground on each side. That will look like 5pF differential so reduce the 39pF to 33pF standard value. 

Would be interesting to take the final design and tolerances and run monte Carlo on the filter shape - I also use 0.5% R's these days in filter since they don't cost much more that 1%. 

Hi Michael,

Could you review the updates?

I may update the resistor tolerance before the board build.

Regards,

Andrew

fibersense_v1p15_pg14.pdf

Here is what I meant for that input snubber, went to 5ohm external, 

Here is 200case monte carlo and file, 

1172.60MHz differential RLC filter.TSC

Hi Michael

Thanks again for the detailed work.

Yes, I can see the effect of the tolerances on MC simulations.

I've updated the L to 2% (The size went from 402 to 603.  The rest of the parts in the filter are 402)

As for resistors, it seems we will have an availability issue for 0.5%.  I will keep an eye on it before manufacturing though.

Could you take a look at the updated schematic?  And I could not open the latest TSC file you provided (showed some error when opening).

Regards,

Andrew

3302.fibersense_v1p15_pg14.pdf

you bet Andrew, 

Good luck with this, be interesting to see the data.