Other Parts Discussed in Thread: TLV3201
I have a question about Fig 25 from the TLV3201-Q1 datasheet. It seems the intent is to show that input voltages on either the IN+ or IN- pins of the device that exceed the rails (VCC or GND) will not cause phase inversion in the device output. I'm a bit confused by the plot, the blue line shows the output, which seems to be swinging between +/-2.5V while the input voltage swings between the same values.
Since the part is a single supply part, I'm not sure why the output would be centered around 0V. I'm also not quite sure at what voltage level the Input is actually at, since it's swinging about 0V as well.
Is the output voltage on a different scale (not shown that is actually 0V to 5.5V)?
What is the input voltage relative to? Is 0V on the input scale suppose to represent VCC so this is showing an input at VCC + 2.5V and VCC - 2.5V?