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LF198QML: Layout guide of guarding techniques

Wantae Kim
Prodigy 40 points
Part Number: LF198QML
Dear TI Support Team.
Hello,
I'd like to get answers from you about LF-198QML which package type is TO-99.
On it's datasheet, there is an guard ring technics for digital feedthrough, but it's an example about 10 pin type and dip-type charging capacitor.
Here are questions below.
1. If I use 8 pin TO-99 Type with SMD charging capacitor, there isn't any space to draw guard ring between pin 7 and pin 8 because of routing clearance.
  Then, how can I draw guard ring in this case?
2. If I need to draw guard ring, do I have to draw guard ring on all layers in multi-layered PCB?(Case) TO-99 Type with SMD Capacitor)
  Or draw guard ring on 1 layer which is placed SMD Capacitors?
3. My project would access LF-198 at about 64Hz intervals and it samples for about 45us. And Slew rate is about 6ns. Then, is it necessary to draw guard ring in my project?
   On your datasheet, mentioned "Fast rise time" but I have no idea how much "Fast rise time" is.
I'm looking forward to your answer.
Thank you in advanced.
  • 0
    TI__Genius 9945 points

    Hi Wantae,

    See my answers below.

    1.) If I use 8 pin TO-99 Type with SMD charging capacitor, there isn't any space to draw guard ring between pin 7 and pin 8 because of routing clearance.
      Then, how can I draw guard ring in this case?

    The guard ring should be placed around the Ch pin (pin 6), to guard pin 6 from the logic signals on pin 8. You may use the 10-pin layout, as shown in figure 22 of the LF-198QML datasheet. The 10-pin layout provides additional space to route the guard ring. See the following post: https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1215568/lf198qml-layout-inquiry-for-to-99?tisearch=e2e-sitesearch&keymatch=LF198QML# 

    2.) If I need to draw guard ring, do I have to draw guard ring on all layers in multi-layered PCB?(Case) TO-99 Type with SMD Capacitor)
      Or draw guard ring on 1 layer which is placed SMD Capacitors?

    The LF198QML is a through-hole device, therefore for best performance the guard ring should be placed on all layers. This will guard the Ch pin from logic signals on all internal layers. On the top layer, ensure that the guard trace runs underneath the SMD capacitor between the capacitor pads.

    3. My project would access LF-198 at about 64Hz intervals and it samples for about 45us. And Slew rate is about 6ns. Then, is it necessary to draw guard ring in my project? On your datasheet, mentioned "Fast rise time" but I have no idea how much "Fast rise time" is.

    The concern is fast transients on the digital logic pin coupling into the analog signal path, especially at the hold capacitor. This is about the rise time of the digital logic, not the frequency or the sample rate. I see your point that the wording in the datasheet seems a bit vague regarding "fast rise time", however it is safe to assume that any good digital signal can be considered having a "fast" rise time. There is a minimum slew rate for digital signals mentioned in the datasheet, see below. We will consider any digital logic that is sufficiently fast enough for proper device operation to be also fast enough to potentially introduce digital feedthrough. Including the guard ring will always provide the best performance.