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OPA211-HT: Gain-Bandwith Product and Stability for sub-unity gain

Part Number: OPA211-HT
Other Parts Discussed in Thread: OPA211,

Hi,

I'm using the HT part (will be at +125C operating temp.) in a fly-back power supply feedback loop, configured as a differential amplifer - the bandwidth is a maximum of 400 kHz.

The gain is set at -0.2 (-14dB) which is to ensure the input voltages never exceed their limits. While the circuit is stable and performs well, I'd welcome a full GBW plot as I'd like to ensure the device is (on paper at least) stable at such a low gain.

Thank you,

BR

Cole

  • Hi Cole,

    We do have an open-loop gain plot in the data sheet:

    If you want to be sure of stability, then you will have to evaluate the closed-loop gain.  I don't see a circuit but in general, for an attenuating configuration, the loop gain, which is determined by the non-inverting gain, will be close to unity gain (the higher the attenuation, the closer the loop gain will be to unity gain).  Unity gain is the highest bandwidth and generally the lowest phase margin.  See below for more information:

    https://www.ti.com/video/series/precision-labs/ti-precision-labs-op-amps.html

    https://www.ti.com/content/dam/videos/external-videos/1/3816841626001/4080254925001.mp4/subassets/opamps-stability-phase-margin-presentation-quiz.pdf

    You could use the Overshoot vs. Cap. load graph to show that with a small cap. load, the overshoot will remain low for a gain of +1.

    This effectively assures stability with low (< 100 pF) capacitive loads.

    I hope this helps.

    Best Regards,
    Mike

  • Hey Cole, there is a  more proactive approach to attenuator compensation described in the THA4551 datasheet in the section called "Designing Attenuators"

  • Mike,

    Thanks for the reply. I'll provide a little more information, but the application is C-I-C, so I'll limit this to a part schematic:

    The output capacitance on VOUT will be 100pF or less. The amplifier output laod capacitance will be a few pF parasitic PCB trace capcitance and so on. It's a very short trace.

    The aim is to provide an output voltage at VOUT of +0.7V with respect to amplifier ground.

    The closed-loop gain of the amplifier is <<1.

    It's not clear to me how to interpret the graph in Figure 10 in this context, if you could explain that I'd be grateful.

    BR

    Cole

  • Hi Cole,

    Ok the first thing to mention here is that the input voltage is below the input common mode range requirement.  The resistor divider from 9.4 V across R5 and R7 gives 1.566 V at the non-inverting amplifier terminal, and the spec. calls for at least 2 V.

    Secondly, the OPA211 is a very low noise amplifier, but you are using resistors around it that have much more substantial noise than the amplifier itself.  Can I ask why you chose the OPA211?  Was it because you are limited to only -HT devices and this was the best choice?

    I would have proposed something like below, if you needed to generate ~0.7 V and you only had the OPA211-HT to use:

    This still does not feature the noise performance of the OPA211 - the resistor noise will still dominate, but with 9.4 V coming in, the current will get quite high if the resistors are sized to match the noise of OPA211.

    Let me know what you think about this.  If you still want to pursue the original circuit, you definitely need to raise the common-mode input voltage to above 2 V.  Then, the device may need a feedback capacitor because the feedback resistors working with the input capacitance will create a low phase margin. I can send more detail but would like to address the other issues first.

    Regards,
    Mike

  • Mike,

    Many thanks for the detailed answer.

    In order:

    Good point about the common mode, self-inflicted, I changed those values on the fly and forgot to re-verify. I’ll amend that.

    The OPA211 is only being used as it’s a very hostile environment. Its noise figure is not relevant, that is, way better than required in this application.

    I can’t use the topology you suggest – I need a true differential amplifier here, as the 9.4V is referenced to a separate ground which is ‘tenuously’ referenced to the IC circuit ground, but the critical value is the difference between the 9.4V and this 'other ground'. I appreciate this is a bit vague :)

    The point about adding a f/b capacitor is a good one, I’ll add a small value to roll off before the dominant HF in the design and improve the phase margin.

    I’ll make the other adjustments you suggest in any event, I appreciate the assistance.

    BR

    Cole

  • Hi Cole,

    Ok.  Just a note on the minimum feedback capacitor, I'd recommend at least enough to have the pole created by the feedback capacitor and resistor cancel out the zero in the closed loop gain.  So, RF*CF = RIN*CIN, where RIN is the parallel combination of the input and feedback resistors and CIN is the sum of the differential and common mode input capacitance.  In the case above, this would amount to  CF = 10pF * 1.66kOhm/2kOhm = 8.3 pF.  Of course more would help the stability further, but would then start to limit the bandwidth.

    Regards,
    Mike