I I want to use ALM2403 to design a circuit that drives the resolver, but because the resolver is an RL load, does TI have any documents that can help me confirm how to design the circuit to avoid circuit instability?
Hi Lin,
does TI have any documents that can help me confirm how to design the circuit to avoid circuit instability?
Enclosed lists below are the how to video series in stabilizing op amp closed loop in a typical application. For resolver load, the techniques are very similar, except the resolver load has R, L and C components, and the load is treated as a rotational transformer.
As in any op amp driving circuit, it is necessary to check for the loop stability. However, we will need to have a schematic first before we are able to simulate the load with the driver.
Please provide me with resolver's load parameters and the circuit design requirements. Without the schematic, it is difficult to discuss the circuit instability, if any.
Below is an example of resolver driver, but your schematic and load may be different from the example. Let us finalize your design first, then we can perform and check for the circuit stability analysis.
ALM2403-Q1 SPWM Input 12122023.TSC
If you have other questions, please let me know.
Best,
Raymond
Hi Raymond,
This is the most basic circuit architecture.
I need to know how to set up the filter connected to the resolver.
My input is a sine wave. If I set the LPF at 20kHz according to your example, this will affect my gain.
For this part, what is the reference for setting the range of the filter, for example, setting it to 5 times the input frequency.
In this example, at 0db, the phase is about 119 degrees and the phase margin is about 60 degrees, which should be sufficient.
Of course, the most important thing is how to judge the stability of the circuit. Please tell me how to judge it on this circuit.
Hi Lin,
From your attached simulation, your differential input signal is +/-5Vpk at 10kHz. If this is pure sinusoidal signal, the setup does not have significant switching harmonics except the fundamental. In this case, you may limit the ALM2403-Q1's BW at >100kHz or 159kHz per your simulation.
There are a couple typos. Your Voffset is configured at 5Vdc, so your DC bias at inverting input should configure the same or at 5Vdc, where AC is riding on top of 5Vdc. Alternatively, you can insert a capacitor to couple the input signals as shown in the simulation below.
The transformer's inductance is a bit high, which I think that it may be a typo. 1250mH is equivalent to impedance of 78537.5Ω (sL) at 10kHz. It is likely that this is 1.25mH instead. Please confirm that your resolver's load parameters. Please provide me with the actual resolver load, not hypothetical one, since ALM2403-Q1 is limited to power dissipation. Typically, resolver may be able to handle the excitation current up to ±100-200mApk @10kHz, which ALM2403-Q1's average heat dissipation is approx. 2W. We have to consider the normal operation at a worst case in temperature condition. For automotive application, the worst case Tamb operating temperature is at approx. 85C to 100C.
If you have other questions, please let me know.
Best,
Raymond
Hi Lin,
Let us assume the inductance is 1.25mH instead of 1.25H, below is the AC stability analysis. Since you mentioned the stability analysis inquiries in multiple occasions, I demonstrate the loop analysis method here.
Please keep in mind that this is generally the last step, because you did not include all the necessary circuitries in the simulation. In the resolver, there are winding capacitance, which we ignored. There are short circuit protection circuitries we did not include. And I do not know if ALM2403-Q1 is capable to drive your resolver load under all Tamb operating conditions, which Tamb is typically up to 85C to 105C for automotive application, depending on the design requirements.
For the simplified resolver load, the phase margin is approx. 76 degrees (360 - 283.7 degrees).
ALM2403-Q1 Dual AC Analysis 12142023.TSC
In TI's precision op amp video training series, which I posted in the previous reply, the method 2 on he bottom stability image is prescribed. The method 3 on the top stability image is basically the same as method 2. Anyway, I post this slide here FYI.
To verify the small signal step transient stability analysis, below is the example, where no overshoot is shown and the circuit is stable.
ALM2403-Q1 10kHz Step Transient Analysis 12142023.TSC
BTW, I am unable to support LTSpice simulation due to the license agreement. In the LTSpice, you may use opamp2 to generate the op amp symbol for the simulation, which is more readable.
If you have other questions, please let me know.
Best,
Raymond
Hi Lin,
According to my simulation results, it seems to be normal. Will there be any problems if the setting does not exceed 5Vdc?
ALM2403-Q1 has a wide Vcm input range, therefore, you can set anywhere within the Vcc or supply rail. Typically, users wound like to configure the Vcm at the mid rail of a Vcc, and configured the Vcm with two equal value in a resistor divider. The Vcm range is determined by your output voltage swing and the minimum Vcm requirements.
Vcm will not be good to set near at the minimum, since there will be no design margins. For a typical resolver with output sinusoidal swing at 7Vrms or greater, the Vcm should be configured at minimum 5Vdc. In the AC analysis example, I configured at 5.5Vdc to provide it with the extra design margins. In the recommended example, Vcm is configured at 1/2 * Vcc. The ALM2403-Q1's output is a differential driver, and Vcm in DC does not enter the transfer equation, as long as Vcm on both end of primary winding of the rotational transformer is equal and tracking.
Could you please provide the input resistor value?
I think that R2 is referred in circled red, see the comments below.
The gain appears to be around 55.6dB, whereas the DC gain I set is about 2 times, which is 6dB.
6dB refers to closed loop gain. During AC loop stability analysis, loop-gain T, is plotted out, which T = Aol/Acl. In log term, it is LogT = logAol - logAcl.
The coupling capacitors C4 and C5 appear to act as high-pass filters. What problems might arise if I do not set these capacitors?
Yes, this is a way to look at it. The excitation frequency is operating at 10kHz, You may increase C4 and C5 to move the poles to a lower frequency. Since you are using the pure sinusoidal 10kHz input, it makes sense to increase the capacitance value to 1uF - 10uF. Or you may use my simulated approach and bias the sinusoidal 10kHz to the Vcm, which I configured it at 5.5Vdc.
I'd like to point out that ALM2403-Q1's input can be wither in sourced from inverting or noninverting input. There are Pros and Cons in either design approach. In the recommended example and design approach, Vcm in DC at the output of differential outputs are fixed and does not change. Since the application is driving a transformer, this design approach has the advantage, where AC is riding on DC Vcm. The transformer does not work in DC, therefore, the DC biasing voltage at the input of excitation transformer will cause the constant DC across the transformer's input terminals, and no DC current will flow within the primary winding, and magnetic saturation in the transformer core will be minimized.
If you have other questions, please let me know.
Best,
Raymond
Hi Raymond,
I think I already know that when AOL is equal to 1/β, phase_AOLβ must be greater than 45 degrees to ensure circuit stability.
But in the example ALM2403-Q1 Dual AC Analysis 12142023.TSC you provided me, why is it not measuring the voltage across Rresolver but measuring Vloopgain?
As mentioned at the beginning, what are the recommended values for the design of the filter capacitor Cemc connected to both ends of the resolver?
Or do I just need to set the filter point I want and ensure that the circuit is stable?
Finally, the example at the beginning is ALM2403-Q1 SPWM Input 12122023.TSC.
How can I adjust it in the circuit so that it can simulate the stability of the circuit?
You can also see that the example circuit uses 2 opas, but what we are discussing now are circuits with one opa.
Hi Raymond,
My design requirements are very simple.
Originally I used the AD2S1210 IC. The application circuit in this IC uses OPA+BJT to form a buffer circuit.
Now I want to use ALM2403 to replace the OPA+BJT circuit.
As you can see, the recommended circuitry within the AD2S1210 is much simpler compared to that within the ALM2403.
In contrast to your initial example, there's an added high-pass filter at the input and an RC circuit (comprising R11, C6, R12, C10) connected to the Resolver winding.
This led me to inquire about the principles behind selecting this RC combination.
You mentioned it's to make the resolver behave more like a resistor.
From that, I speculate that it's meant to generate RLC resonance in the output load, allowing the LC components to cancel each other out, mimicking a resistance-like behavior in the load.
However, I'm still uncertain about how to simulate the entire circuit to verify if the load behaves as a resistor.
Since the stability circuit we're currently discussing is a simplified version based on the recommended circuitry in the AD2S1210, I also want to understand how I should simulate stability regarding the example you provided.
Hi Lin,
Thanks for providing the design requirements. When engineer asks for an open ended questions, I do not know what is the best answer to address these questions, because there are many considerations and/or options.
Regarding to the analog input stage and ALM2403-Q1 filter choice, here is one of the suggestion. The ALM2403-Q1's BW is limited to 159kHz range and you should not see a significant amplitude attenuations from input signals. Since the input is ±10Vpp, the ALM2403-Q1's gain can be configured for -1 V/V.
In terms of resolver driver circuit, here is the basic driving configuration. The output will meet the 7Vrms @10kHz voltage swing requirements.
ALM2403-Q1 10kHz Resolver Driver 12182023.TSC
Previously, it was directly connected to the resolver. I'm curious about the differences between the two approaches.
The ALM2403-Q1's power amplifier output stages are fairly well matched, so the there are no significant voltage biasing at the primary winding of a resolver. So we can use direct coupling as shown in the simulation above, and resolver's magnetic will not be saturated due to the design approach.
In many discrete resolver driver configuration, due to the mismatching of power amplifier driver stage, the DC biasing across the primary winding of a resolver may no be as consistent, and there may be a large voltage delta in DC across the winding. Under the such scenarios, the capacitive coupling may be more suitable. The capacitor will block the Vbias difference, and as long as the differential output driving signals are balanced, the resolver should not experience residual magnetism shift or walk within the magnetic core of a resolver, therefore the magnetic core (BH curve) will be reset in each cycle during operation.
In terms of AC loop stability, I performed the Loop Analysis in the previous reply and it should apply to the same circuit.
Below is ALM2403-Q1 EVM, which you may purchase from digikey.com or mouser.com. You may modify the EVM and get the resolver running rather quickly.
Please let me know if this is what you have in mind. We can make additional changes from the baseline design.
Best,
Raymond
Hi Lin,
I am glad that this helps.
The resolver driver is feed forward driving architect for the resolver's primary winding. The negative feedback is placed at the output of the power amplifier or at the input terminals of resolver. So are the sine and cosine return lines. Assume the magnetic link is near 100% coupled (treat it as ideal transformer at 10kHz), the secondary windings of the sine and cosine coils are simply proportional to the turn ratios. No feedbacks are needed for the resolver application. the coupling losses can be negligible for the operating frequency.
The ALM2403-Q1 EVM is only addressing how the resolver's primary winding is driven. The secondary windings in sine and cosine coil interfaces are not addressed on the board.
If you want to know about how to capture sine and cosine in the 2nd windings, please check out the links below.
If you have other questions, please let me know.
Best,
Raymond
Hi Lin,
I cannot sum these before inputting them into the AD2S1210, so I need to design circuits for processing sin_p, sin_n, cos_p, and cos_n separately.
Yes, you have to amplifier the sine and cosine signals first. The schematic below is shown how the difference amplifiers are implemented to obtain sine and cosine secondary windings information. You have to gain up the signals first before you sample the waveforms. The image is in the first application note that I posted.
Does TI have any documentation on using OPA filters and designing for pole-zero cancellation?
Do you have a circuit in mind? This is an open ended question, and I do not know how to answer it properly. In our precision op amp video training series, the topic are mentioned numerous times, please see my previous video links. In order to maintain the op amp's stability with adequate phase margin, an op amp's roll off needs to be maintained at -20dB/decade across the unity gain bandwidth. Please revisit these video series.
If you have other questions, please let me now.
Best,
Raymond
Hi Raymond,
As shown in the diagram, the sin and cos signals are intended to enter the IC in a differential mode.
This is an example circuit.
Here is the simulation circuit.
You can see the phase delay of the circuit is 18.8.
In addition to providing the gain adjustment, the receiver circuit also acts as a third order Butterworth filter with a cutoff frequency of 63 kHz and a phase shift of −18.6° at 10 kHz.
The simulation results are almost identical to the description in the documentation.
I believe phase delay in handling the sin and cos signals could be a significant concern, potentially causing the motor angle derived from the IC to lag.
Therefore, I need to advance the phase to prevent severe phase delays.
Hi Lin,
The E2E forum is supported via US site, and we are currently in holiday recess due to Christmas and New Year holidays.
To answer your question, here is the site that you may be able to get what you are looking for a different filter configuration.
http://sim.okawa-denshi.jp/en/MultipleFB3Lowkeisan.htm
As I asked at the beginning, TI does not seem to have a reference design or document for resolver feedback signal.
Here is the reference design for the resolver feedback signals. It is simply a difference amplifier.
Best,
Raymond
