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OPA2991-Q1: OPAMP with high input impedance in unpowered state

Part Number: OPA2991-Q1
Other Parts Discussed in Thread: TPSI3050-Q1, OPA2991, LM2904B-Q1, OPA310, OPA991, TPSI3050, CSD19534Q5A, CSD19538Q2


I am developing an analog voltage measurement 0 .. 10 V that has (besides other) a requirement to have an input impedance between 850kOhms and 900kOhms (for Voltagerange 0V-10V).

This is in powered and upowered state!

For the powered state, OPA2991-Q1 suits very good (low input leakage currents).
The Input divider looks as follows. The factor should be near 1, to introduce the least error caused by the resistances (0,1% already selected)

But in unpowered state the internal protection diode to the positive supply rail (which hat GND-Potential in that case) will conduct and "shorten" R2 and R3.

I already tried to "open" up the connection to the OPA with a FET (driven by a TPSI3050-Q1). This helps, but there the FET drain source leakage current produces the same problem also via the internal protection diode.

My Question:

  1. Is there a OPA available, with an "absolute" input voltage capability?
    Up to 10V would be sufficient. Performance should be similar to OPA2991 (Bipolar supply, low input leakage,...)
  2. If there is no such OPA; is there a FET, with very low drain source leakage current (<10nA)

Thank you


  • Hey Sebastian,

    As far as op amps go, there are a few devices that do not have a diode to V+, but almost all will have a diode to V-. I'm not sure if this is part of your requirements. LM2904B-Q1 does not have a diode to V+ and is able to see up to 40V on the input (relative to V-). However, the performance of this device is not as good as OPA2991, and will have higher input bias current.

    There are some CMOS amplifiers that do not have diodes to V+, however, these are low supply voltage devices. The OPA310 is currently in preview, but does not have a diode to V+ and will have a typical input bias in the pA range when powered.

    The next alternative to consider are the shutdown devices. These will tolerate voltages to V+ on the input, but power will have to stay supplied to the device. The single channel variant of the OPA2991 (the OPA991) is available for preview in shutdown.


  • Hi Jerry, 

    Thank you for the information.
    unfortunetly, I thought that the situation is like that...

    I checked LM2904B-Q1. And as you mentioned, the input leakage current is too high. This would introduce too much error into my application.

    The CMOS amp sounds good, but as I have an operating input voltage of 10V, the low supply range would cause too much design change to cope with. And then too much risk of having another issue...

    A shutdown device cannot be used, as I really will be unpowered and energy storage is not allowed.

    I would close this topic in regards of an amp...

    But maybe you could help me with a FET, capable of Vds >60V with low leakage currents, or known values for other Vds than near breakdown.
    or should I ask this question in a different forum?


  • Hey Sebastian,

    I can move this thread over to a different forum for you!

    Unfortunately, I don't have as much background or insight into discrete FETs, but I can forward you to a team that may be able to help.


  • Sebastian,

    I have a few questions to try and help us narrow down to the best MOSFET suggestion:

    • What are the conditions you are looking to operate the MOSFET?
    • What current through the device?
    • What do you consider low leakage? mA, uA, nA, pA?? Do you have a leakage target?
    • What is the gate drive voltage?
    • I was wondering if you really need a 60V+ MOSFET, seems you say 10Vin is the abs max, so maybe a 30V FET would do?

    MOSFET leakages depend very much on the conditions they are used, we did a couple of articles you may find useful here that shows how leakages vary with temperature and voltages, in addition to the variations shown in the datasheet :


    Look forward to hearing from you

    Best Regards

    Chris Bull

  • Hello Chis, Jerry,

    @Jerry: moving the thread to a more apropriate forum would be ok for me.


    As mentioned above, I would use the MOSFET to "disconnect" the OPAMP protection diodes from the voltage divider in case of unpowered connector.
    The voltages at the input of the divider range from 0V to 10V (also in powered and unpowered state). And in every operating point I need to fulfill the 850k to 900k Ohms input resistance requirement.

    My idea is, to build a solid state relay function with a TPSI3050-Q1 (this is an isolated switch driver we use also inside this project). With this driver, I assume, some Leakage currents to the gate can be neglected. But the drain source leakage not...

    To answer your Questions:

    • Conditions to operate: see above.
    • Current through the device: During normal operating only the input leakage of OPA22991. And during a lightning event, it will be limited to +/-10mA, the OPA pins are capable of.
    • What is low leakage: A quick Calculation shows, that a leakage <50nA should be sufficient
    • The Gate driver voltage would be ~10V generated from the TPSI3050
    • The 60V+ is because of Lightning events, that should be withstand. The event is with higher voltage, but a filtercap at the divider damps it to below 60V

    Thank you, for the two articles. This is very interesting.

    Can you confirm, that these curves are dependent of techonlogy. So could the be transformed to other devices with margin and engineering judgement?



  • Hello Sebastian,

    It looks like the FET would be used in a high side switch configuration with the drain connected to the center of the resistor divider and source connected to the OPAMP input pin. In that case, the gate needs to be driven to a voltage higher than the drain voltage by the minimum value of VGS where rds(on) is specified in the datasheet to guarantee it is fully turned on. The TPS3050 provides a nominal 10V floating gate drive which should be adequate for most TI NFETs. For this application, I'd recommend the CSD19538Q2, 100V NFET in 2x2mm SON package. The max drain-source leakage current, IDSS is specified in the datasheet is 1μA at VDS = 80V & Tcase = 25°C. I pulled up the characterization data collected during product development and TI only tests at VDS = 80V. The data shows a max value around 30nA at VDS = 80V & Tcase = 25°C for the samples tested. At 75°C this increases to around 120nA. However, at VDS = 10V & same temperature, IDSS is greatly reduced as shown in the technical articles. I was able to find data for another 100V device in this same process, CSD19534Q5A, and at 10V, the typical leakage is about 7nA. I think it should be < 100nA for your application but TI can only guarantee what is specified in the datasheet and tested in production. In general, the curves shown in the technical article will be similar for TI FETs with the same ESD structure. See article at link below for more information on ESD structures used in TI FETs. There will be some variation based on die size, BVDSS and process generation.

    Best Regards,

    John Wallace

    TI FET Applications

  • Thank you,

    not the Information I was hoping for, but at least may be a way for me.

    Now I need to find an argumentation, why my circuit is ok although the datasheet does not state it.