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OPA320: Recovery time in simulation

Part Number: OPA320
Other Parts Discussed in Thread: TINA-TI, OPA699

Tool/software:

Hi,

I have an OPAMP integrator stage with single supply (VCC=3.3V, VEE=0V). OPAMP is the OPA320.



When I do a simulation with TINA-TI I see a delay time of around 5.2us when the integrator should come out of saturation (from 0V).




In the OPA320 datasheet I can see a overload recovery time of 100ns.

What could be the reason for this long recovery time?

Thanks and best regards,

Patrick

  • The models do not usually try to emulate the recovery time as a very non-linear event - kind of why the shutdown feature has been neglected in a lot of the models. 

  • Michael,

    In this particular model it is implemented: (at least it should be...)

    *****************************************************************************
    * Model Usage Notes:
    * 1. The following parameters are modeled:
    * a. OPEN-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Aol)
    * b. UNITY GAIN BANDWIDTH (GBW)
    * c. INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR)
    * d. POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR)
    * e. DIFFERENTIAL INPUT IMPEDANCE (Zid)
    * f. COMMON-MODE INPUT IMPEDANCE (Zic)
    * g. OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo)
    * h. OUTPUT CURRENT THROUGH THE SUPPLY (Iout)
    * i. INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en)
    * j. INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in)
    * k. OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo)
    * l. SHORT-CIRCUIT OUTPUT CURRENT (Isc)
    * m. QUIESCENT CURRENT (Iq)
    * n. SETTLING TIME VS. CAPACITIVE LOAD (ts)
    * o. SLEW RATE (SR)
    * p. SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD
    * q. LARGE SIGNAL RESPONSE
    * r. OVERLOAD RECOVERY TIME (tor)
    * s. INPUT BIAS CURRENT (Ib)
    * t. INPUT OFFSET CURRENT (Ios)
    * u. INPUT OFFSET VOLTAGE (Vos)
    * v. INPUT OFFSET VOLTAGE VS. TEMPERATURE (Vos Drift)
    * w. INPUT COMMON-MODE VOLTAGE RANGE (Vcm)
    * x. INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm)
    * y. INPUT/OUTPUT ESD CELLS (ESDin, ESDout)

    But I think it goes into the same topic as I have found in the following thread (?)
    https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/206297/fast-overdrive-recovery-time-of-opa699

    Regards,
    Patrick

  • Its easy to say you have it modeled, but in reality the physical and simulated recovery times are very external config dependent and you cannot pick up all those conditions in a model - unless you use the full transistor level Cadence models, and no one does that for customer models. The OPA699 that I did includes an active output limiting stage where that keeps all the internal nodes from saturating, making this phenomena more physically reliable, but still difficult to model. 

  • Hi Patrick,

    You are correct that the overload recovery time is modelled for the OPA320.

    See below when the model is configured in the datasheet test condition the recovery time is ~100ns as defined in the spec table.

    For your circuit configuration, if you probe the voltage directly at the inverting input pin you will see the pin voltage is not instantly changing to 0V as it appears to when looking only at your VM node. This is due to the RC time constant of your input resistor and integrating cap.

    As the amp is slammed into the negative rail, it cannot recover until the inverting pin voltage is less than the voltage at the non-inverting pin. You should measure your recovery from the time the inverting pin is less than 1.65V, which gives ~200ns in this case. The slight difference from the datasheet spec is due to the circuit configuration and the slower speed of the input voltage change. As Michael pointed out, the recovery time is a non-linear event which is difficult to model perfectly matching the silicon, however in this case I believe we can see a very reasonable approximation.

     

    I've attached these simulations below for your reference.

    OPA320_RecoveryTime.TSC

    OPA320_RC_Recovery.TSC

    Regards,

    Zach