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LMP8601-Q1: Vs pin short with GND

DEVENDHIRAN KUMARASAMY
Prodigy 110 points
Part Number: LMP8601-Q1
Other Parts Discussed in Thread: LMP8601

Tool/software:

We are using LMP8601QMAX device.

It has been working fine during the validation testing for the past few weeks.

During the validation, suddenly the LMP8601 output goes to 0V then we analyzed and found that supply voltage itself goes to 0V after power up.

So during debugging we found that the impedance across the +5V supply and GND is reduced to 1.5 Ohm. After lifting the Pin 6 (i.e., Vs pin of LMP8601QMAX) the impedance increased to normal range (as like previous working condition i.e., 4.5K ohm) and also 5V is properly generated by the power regulator.

Still this 1.5Ohm resistance is observed between Pin 6 (Vs) from the pad and GND after lifting the pin .

So, kindly let me know the possible conditions which could cause the short between Vs and GND pin within the device.

Regards,

Devendhiran K

  • 0
    TI__Mastermind 28870 points

    Hello Devendhiran,

    Is there any way during you power up you are causing any of the pins to go beyond the "Absolute Maximum Ratings".  Normally this issue is caused from overstress damaging the device.  During startup or transient depending on your conditions you may go beyond these values causing damage.  If you can narrow down the issue I can suggest other device that may work better.

    Regards,

    Javier

  • 0 in reply to Javier Contreras4
    Prodigy 110 points

    Hi Javier,

    Thanks for the suggestion.

    I also did some analysis about the environment in which this failure has occurred. Due to small leakage in the vent of the environmental chamber water small amount of water droplets are observed near to the PCB during low temperature environment. Hence, some amount of moisture could also reach the IC pins in which wires are taken out for the measurement. (Note- Wires are taken out from all the wires)

    Since OFFSET & Vs (both are connected together in our application) are near to IN+ pin, 24V applied at IN+ may reached the OFFSET+Vs pin which could lead to overstress the device (as you suggested) and might causes the failure.

    This is my understanding for the possible cause of failure of the device (with the failure case of Vs short to GND).

    Now we have replaced the failed IC with new one and did some preventive actions to avoid the water leakage inside chamber during low temperature testing. Will update you after the completion of low temperature testing.

    Regards,

    Devendhiran K

  • 0 in reply to DEVENDHIRAN KUMARASAMY
    TI__Mastermind 28870 points

    Hello Devendhiran,

    Ok.  Thanks for the update.  

    Regards,

    Javier