Other Parts Discussed in Thread: UCC21756-Q1, TL431, UCC33420
Tool/software:
Hi,
I am using UCC21756-Q1 gate driver IC for driving an SiC MOSFET. The power supply used to generate +15V and -5V for the gate driver is UCC14241-Q1.
The power supply for the gate driver board is received as 24V from the control board which is directly used for the UCC14241-Q1 IC. The 24V input to the UCC14241-Q1 IC has an EMI filter circuit with a common mode choke and differential choke. The input power supply for the UCC21756-Q1 IC is generated by a non-isolated 24V to 5V LDO as shown in the figure.
I have a few questions regarding the architecture.
- Can we use the LDO output (5V-DGND) to pull up the ENA (enable) and /PG (power good) pins of UCC14241-Q1 IC? Should a separate circuit be used for the bias voltage (Vbias) as shown in the figure?
- The gate driver fault indication signal FLT is fed back to the controller board for protection circuit. This signal is wrt the digital ground (DGND) of the controller board. If we plan to also give /PG also as a feedback signal, can we directly give the signal (/PG) to the control board? Since the /PG signal is wrt GNDP, should a digital isolator be used?
Thank you