PGA280 Settling times

Luis:

Thank you so much for the detailed response and attached  white paper on opamp settling times and slew rate.

My question which i posed to you earlier was,since the rated Ts spec is 30uS for an 8Vpp signal, would this value be reduced by half  to 15us if i had a maximum input of 4Vpp, all things being equal?

Does using the BUF option help with improving settling time on the input and output? This chip would be ideal for my application if i could somehow improve on this spec.

The gains switching time i was referring to was internal to the chip. Once its received an SPI  command to switch gains from1V/V to 128V/V, how long will it take for the amp to settle to the new gain?

Regards,

David

Hello David,

1)  The slew time is a large signal parameter and is a function of the output swing and load capacitance. The recovery time is a small signal parameter that is related to the phase margin of the amplifier.  The total settling time is the addition of the slew time + the recovery time.  So if you reduce your output swing by 1/2, the slew time is reduced by 1/2; but you still have to account for the recovery time.  Since in this case the total settling time is dominated by the recovery time to settle to 0.001%,  you can not assume 1/2 settling time for 1/2 output swing.

-- In the example where the gain = 2 for a 8 Vpp swing,  the total settling time to 0.001%  is ~30us where ~4us were used on the slew time and ~26us were spent settling to 0.001% target.

- - In the example where the gain = 2 for a 4 Vpp swing, the total settling time will be somewhere in the order of ~28us (probably a little less); where 2us were used on the slew time and you still have to deal with the recovery time which is related to the phase margin and is not a linear function of the output swing. 

2) The buffer helps by isolating the input of the PGA280 from transients generated when changing channels in a mux.  This is explained on page 21 and 22 of the datasheet. 

3) On the last question, the time internal of the chip after receiving the command to switch gain is probably very small or negligible compared to the time for the output to settle; I will see if I can find that information.

Best Regards,  

Luis

Luis:

Another excellent answer. Thanks!

 Here is the skinny on my real application. I have an analog mux that would precede the PGA280 that i switch every 80uSecs. I allow about 16uSecs for the mux to settle (though it could be shorter as its switches in nanoseconds). This leaves me 64usec to sample the analog signal into my 16-bit 1 MHz differential input ADC (ADS8472). I would normally take 64 samples (during the 64us internal) and average them (in software) to get a single value i process later on. Now, since the PGA280 doesn't settle until after 40usecs, can i do the following:

1.   Use samples 41 to 64 to get my average value?  I average to clean up the noisy input signal. This is in addition to the noise filter i'd have at the input to my ADC.

                Or

2.   Average for the whole 64uS to get my value. I postulate that the decaying sinusoid within the 40usec settling time of th amp would average out to the steady state value i'm looking for anyways. Is this a valid argument or am i flawed in my thinking?

Thanks,

David

Hello David,

The ADS8472 is a SAR converter which samples at a relatively high speed and requires a high speed, low noise op-amp such as the THS4031 with 100MHz BW.  The PGA280 is generally used to drive delta-sigma converters such as the ADS1259.

What are the differential input voltage and common-mode input voltage range requirements of  your input signal?  How many channels are required on the application? are you needing 16 bits of resolution?  There are also other options such as the ADS8556 SAR that can sample 6 channels simultaneously, +/-12V input signals.  There is also the ADS1174 quad channel simultaneous sampling; etc... 

To answer your question, in general, you probably want to go with the first approach; since depending of what the decaying sinusoid or the unsettled signal shape may look like; the average for the first unsettled samples is not going to equal the settled voltage.

Best,

Luis

Luis:

Thanks for taking the time to answer my pesky questions. You;ve been extremely helpful so far.

My application involves measuring the resistance of 256 resistive elements by injecting a precise current and measuring the voltage, via the 4-wire method. Accuracy and  is 0.01 ohms and repeatability at 0.005 ohms. Values range from 1 ohm to 10,000 ohms. I have eight 16x2 differential output muxes(ADG732 from ADI) for the resiatnce voltage and the same number to inject a current into each element.

The process involves switching to a given mux channel, inject a current (via the current mux and anywhere from 0 to 2mA) and measuring the differential output voltage via the ADG732 diff muxes which are fed into the PGA208 input. I have 8 of these mux outputs connected to the 208 and read any one of the 16 channels per mux while the other muxes are tri-stated.

I need to have a quiet , fast, accurate and flexible PGA to accomodate the wide dynamic range of signals i would encounter. Each of the 256 channels is scanned for a time interval of 80us. 16us of which is allowed for mux and amp settling times and the remaining 64us used for sampling 64 samples at a 1us interval.Hence the use of the ADS8472 accurate ADC. I could reduce the 16us to maybe 4us as the muxes switch and settle in nanosecs to allow for more time for the PGA 208 to settle.

I don't understand why the PGA208 wouldn't be a good fit for th ADS8472 with the appropriate post-filter on the 208 outputs. Can you please explain the downside to this?

My input voltage into the ADS8472 would match its requirements, namely 0 to 4.096 volts differential by the juducious use of the flexible gain switching of the pGA208 and current selection (0 - 2mA) in increments if 0.01mA.

Regards,

David

Hi David,

When choosing an amplifier to drive a SAR converter; an estimate of the minimum required -3dB bandwidth of the driving amplifier required to drive the converter may be calculated using the  following approximation:-

f3dB = + 4*ln(2)*ln(n+1) / (2*pi)*(acquisition time);

Where n is the required bits of resolution.   Typically you will want to use an amplifier that exceeds this requirement.  The acquisition time of the ADS8472 is 320ns; therefore the minimum f3db bandwidth for the amplifier needs to exceed ~22MHz; the PGA280 is not optimal to drive this SAR converter. The THS4521 or the THS4031 with the circuit shown on page 23 of the datasheet may be optimal to drive the ADS8472 converter.

 You have mentioned the application requires to measure resistors ranging from 10kOhm to 1 Ohm in range with accuracy of 0.01 Ohms and repeatability of 0.005 Ohms.   If its meant 0.01 ohm accuracy on a 1 Ohm resistor,  this corresponds to 1% accuracy which is possible.  What is the accuracy required for the 10kOhm measurement?  For the 10kOhm resistor 0.01 Ohms corresponds to 0.0001% accuracy and 0.00005% resolution (better than 21 noise free bits) which is not realistic because of all the noise and measurement errors in the system, and the time constraints given. 

Attached is a good article that provides some guidelines to choose the Op-amp and RC filter to drive SAR converters prepared by a colleague.

Best Regards,

Luis

Article attached below:

7288.forum2_SAR_OPA.pdf

Luis:

I apparently misspoke here and i'm really sorry for the confusion. My bad indeed!!!

The customer needs 0.01% accuracy from 1 ohm to 10Kohm and not 0.01ohm spec i erroneously stated above. So this means +/- 0.0001 ohm accuracy/repeatability for the 1 ohm(which you can buy from several vendors) and 1 ohm accuracy/0.5 ohm repeatability for the 10k resistance.

Thank you for the attached article as well. Its veryhelpful. What 16-bit, 1 MHz ADC would you recommend that would be optimal to use with the PGA280?

Regards,

David

Hi David,

I think a delta-sigma ADC converter solution may be more appropiate to meet your DC accuracy requirements. There is usually a trade off between data rate VS noise/DC accuracy.  A resistor measurement could be considered more of a DC measurement.; where DC errors such as offset, and offset drift, Gain error, Gain Drift are more critical.

I would suggest looking at the ADS1278/4 (24bit), ADS1178/4 (16bit).  You will need (8) PGA280's to drive these simultaneous sampling Delta Sigma converters; but this will also relax the settling time requirements on all your circuitry at your analog front end.

The ADS1278 offers complete settled data after 76 conversion periods.  At a datarate of 144kSPS, the device will provide  you settled conversions at ~527us.  Since you have 8 channels in parallel this solution may meet your timing requirements.

Best Regards,

Luis

Luis:

Thanks for the recommendation and the time taken to answer my questions. YOu've been extremely helpful.

Thanks again :-)

Regards,

David