Tool/software:
Hello,
I plan to bias the PGA855 as follows:
VS+,VS-= +-18V
LVDD=5V
LVSS=GND
Can the amplifier of the output stage (A3) be damaged if the (Vin+ minus Vin-)*G is greater than 5V or lower than 0V?
I like the idea of using the output stage as a kind of limiting amplifier to protect the ADC stage afterward. Hopefully without damaging the output stage due to overloading of the input stage of the PGA855.
Thanks
Sariel



