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OPA227: OPA227 output has negative（positive） bias, when using a capacitive voltage sensor

xiaohong pan
Prodigy 20 points

Part Number: OPA227
Other Parts Discussed in Thread: OPA191, OPA277

Tool/software:

1. The principle of capacitive voltage sensor is shown in the picture:


2. The schematic diagram of the design, as shown in the picture: (The schematic only leaves a schematic diagram of one channel, but in reality, all 8 channels have the same problem)
After the sensor output passes through connectors J600 and R601, it is input to OPA227. After passing through a low-pass filter, it is input to ADC ADS8588.


3. The current problem is that when using a capacitive voltage sensor, OPA227 will have a negative (positive) bias voltage output, causing waveform down (up) shift distortion and incorrect data collected by the ADC.
4. Measures taken: Remove resistors R600 and R603, disconnect from ADS8588, and eliminate the influence of ADC. Then input the waveform for testing.
The signal generator inputs a waveform of 10VP-P, 50HZ, and then connects it to a capacitive voltage sensor (using two 10nF capacitors in series), and outputs a waveform of about 5VP-P to connector J600, which is then output through OPA227.
Image 1: OPA227 Input Front End Waveform

Image 2:  Waveform at the output of OPA227  (with negative bias)


5. At first, I suspected that the bias voltage was brought in by the input terminal, so I changed the resistor R601 at the front end to a 10uF capacitor. However, the problem still exists, and there may be negative bias or positive bias.
6. However, using an electromagnetic voltage sensor is not a problem as the waveform will not show any up or down bias. Basically, the swing is around 0V. The electromagnetic voltage sensor is shown in the following picture:


7. Why is there an uncertain positive or negative bias when using a capacitive voltage sensor after passing through OPA227? Moreover, the bias size of each channel is not the same. Why is there an uncertain positive or negative bias after passing through OPA227 when the front-end input of OPA227 does not bring in bias voltage? But using electromagnetic voltage sensors does not have this problem!
How should we solve this bias problem?

Thanks！

panxiaohong

  • 0
    TI__Guru 55466 points

    Hello Panxiaohong,

    The issue is related to the DC input bias voltage of the OPA227 amplifier. 

    In essence, when you use a capacitive voltage divider sensor, the signal is AC coupled into the inputs of the op-amp; but you will require a voltage divider to set the DC bias voltage at the inputs of the op-amp or a voltage reference connected via a resistor to set the input DC voltage. In the circuit above, the op-amp circuit does not have a DC signal path biasing the inputs of the amplifier properly, and hence the high impedance op-amp inputs are drifting up or down without any well defined DC input bias point.

    Typically, on AC coupled signal applications, designers use a voltage divider at the inputs of the amplifier, using the voltage supplies of the op-amp (or a voltage reference) to bias the inputs at the required DC voltage.  Nevertheless, the circuit designer needs to account for the AC frequency response of the circuit when selecting the resistors of the voltage divider.

    What is the value of the capacitors on the sensor on the capacitive voltage sensor shown in the picture at the beginning of your post? 

    The fundamental frequency is at ~50Hz. What is the input signal min and max frequency range of interest? 

    Thank you and Regards,

    Luis

      

  • 0 in reply to Luis Chioye
    Prodigy 20 points

    Hello Luis：

    The value of the capacitors on the sensor on the capacitive voltage sensor  as bleow：

    The input voltage for AD is as follows: Vout=(100/3100)Vin。

    The frequency range refers to the frequency of the power system。 It is 50HZ to 60HZ.

    How to set up the voltage divider in the op-amp front-end? Because we had set it up before, the result became a high pass filter, and the signal could not be tested at the output end。

  • 0 in reply to xiaohong pan
    TI__Guru 55466 points

    HI Xiapong,

    Yes, using a voltage divider, or a bias pull-up / pull-down resistor on an AC coupled sensor to provide DC bias, sets the corner of a high-pass filter. The resistor selection could be a challenge when attempting to measure a low frequency signal when the sensor capacitive attenuator uses relatively small capacitors. The high-pass corner frequency needs to be set at a lower frequency than the 50-Hz signal of interest.

    The equivalent capacitance of your sensor is the parallel combination of the 100pF and 3000pF capacitors. Hence, the equivalent input capacitance is 3.1nF.  If we need to bias the input to ground, we require a bias resistor connected to GND with an equivalent impedance higher than > 10.3MΩ, to set the high-pass -3dB corner frequency lower than < 5-Hz (more than a decade below the 50-Hz signal of interest).

    One possible solution is to use a 25MΩ resistor connected to GND.  The OPA227 is a bipolar transistor input stage amplifier w input bias current of ±1.5nA.  Since we are applying a relative high-impedance input bias resistor, to minimize errors, a suggested solution is to use a CMOS (or JFET) input amplifier that will offer a much lower input bias current. For example, the OPA191 is a CMOS input amplifier with much lower input bias current; which will help reduce noise.  See below a possible circuit below.

    The frequency response extends from 2-Hz to 364kHz.  We can adjust the RC filter at the output of the op-amp to limit BW.

    TINA simulation file:

    OPA191_example.TSC

    Thank you and Regards,

    Luis

  • 0 in reply to Luis Chioye
    Prodigy 20 points

    OK.

    I will give you feedback after trying it out!

    by the way，

    Input bias current of  OPA227 is not ±1.5nA, but ±2.5nA?

    Thanks

    panxiaohong

  • 0 in reply to xiaohong pan
    TI__Guru 55466 points

    Xiaohong,

    The OPA277 is a bipolar input device with input bias current cancellation, therefore the resulting input bias current is the difference between with input bias current and the cancellation current. The residual input bias current can be positive or negative. The input bias current at 25°C can be as high as ±10nA max (conservative), where the distribution of input bias across many devices is centered relatively close to 0. The typical based on the mean + 1-sigma distribution across samples is around ±2.5nA. The typical characteristics of the datasheet on Figure 6-15 shows a plot of the behavior of the input bias current vs temperature for a typical device.

    Regards,

    Luis

     

  • 0 in reply to Luis Chioye
    Prodigy 20 points

    Hello Luis:

    1. According to the simulation schematic, adding a 25M resistor at pin PIN2(V+) , output signal waveform still has bias under a capacitance of 100pF+3000pF test. The graph is as follows:

    2. a capacitor of 0.1uF+0.1uF is used to achieve the 10Vp-p at OPA191's PIN2(V+) , due to the fact that our signal generator can only reach a maximum of 20Vp-p, and the waveform also shows bias.

    The waveform at the front end of OPA191 is as follows:

    and after passing through OPA191, the waveform is as follows，and there has been a phenomenon of roof cutting.

    3. I have also tried differential input configuration using TL091, the output of TL091 has also a phenomenon of roof cutting.

    Do you have any other ideas?

    Thanks！

    panxiaohong

  • 0 in reply to xiaohong pan
    TI__Guru 55466 points

    HI Panxiaohong,

    The issue is not related to the op-amp circuit, but the capacitive divider or DC bias injected by the sensor.

    Can you clarify: Do you have a data sheet for this sensor?  OR are you attempting to build a capacitive divider using standard capacitors?  

    You are likely not modeling the impedances of the sensor properly, or you are likely not modeling the complete parasitic impedances of the capacitors.

    A complete capacitor equivalent model that incorporates the capacitor non-ideal behavior includes a parasitic parallel resistance (Rp), series resistance and series inductance that will likely inject a DC bias. The non-ideal behavior of a capacitor divider is due to imperfections within the capacitor’s material that create resistance causing the capacitor to dissipate energy. This can be represented in a circuit with a resistor in parallel (RP), as well as a resistance (ESR) and series inductance (ESL).  Below is a model for a 1µF capacitor including the parasitic resistances and inductances. 

    The caveat, is the parasitic resistive components on the capacitor may vary with the type of capacitor, capacitor part number, and since these are parasitic components, these parameters are not well controlled, and will tend to vary across devices and across production lots even when using the same capacitor type/part number. 

    The difficulty is that there could be relatively wide variations on these parasitic impedances. Even if we implement an active DC bias feedback circuit to sec the DC bias, a situation "may"  occur later in time where the input signal may be outside the input common-mode voltage range of the first buffer amplifier (powered with ±10V supplies), producing a clipped signal or non-working circuit, depending on the range of variation on the parasitic impedances of the capacitive divider...

    Have you consider using a high-impedance resistive divider instead?  For example, you could use the circuit below. You could use a set of series resistors to accommodate the high-voltage without violating the voltage rating of the resistors.  The voltage divider will attenuate both the AC and DC component of the signal. If there is a DC bias you want to eliminate, you could add a second stage AC coupled buffer.

    Thank you and Regards,

    Luis