INA260: ALERT Pin Behavior During I2C Access

The I²C master can read from the SMBus Alert Response address (0001100) to get the address of a device that generated an alert. The device that did return the address then clears the alert.

This makes sense only if you have multiple devices with an alert output. If you have a single device, you already know that it is the source of the alert.

Conor,

Is your concern here the SMBus alert response, or the actual ALERT pin of the device? If your concern here is the SMBus, I agree with Clemens' assessment below. If its the ALERT pin, then the ALERT will be asserted when there is a condition that causes an ALERT, regardless of whether or not communication is in progress. This is to ensure the fastest possible response to something like an OC condition. I do not necessarily know why this would cause concern in application.