Tool/software:
I am re-designing a Software defined radio for a 100kHz signal. I have simulated my Analog front end in TINA since I am using a TI OPAMP and the simulation is acceptable. However The PCB I designed for it with the circuit seems to be unstable where the outputs of the first stage of the gain blocks are at either rail of the OPAMP even when the closed loop gain is only 2V/V.
The input to the system is a 100kHz sinewave from a function generator applied to the transformer with 200mVpp and 0V offset.
When I run my simulation my results are acceptable and show a final output voltage that fits my ADC inputs perfectly (AD9262 see link for data sheet). VM1 is post DC blocking cap C1 so Im confused as to where the 1.8V offest is coming from but overall, the outputs VM5 and VM6 are exactly what I want. This is great until I get my board and my circuit seems to be unstable and the differential outputs of each stage of the cascaded OPAMPS seem to lock to a positive or negative rail and not switch at all.
I feel like im talking myself in circles so if anyone could look at the sim circuit and weigh in Id be very greatful. I forgot to take scope captures today of the board and can update tomorrow with ore information.
The OPAMP is a THS4531 with data sheet Ultra Low Power, Rail-to-Rail Output, Fully-Differential Amplifier datasheet (Rev. C)
ADC AD9262 datasheet AD9262 (Rev. A)
Please see https://www.reddit.com/r/rfelectronics/comments/1hgq6q8/issues_with_fully_differential_rf_gain_blocks/ for images as I cant upload them here for some reason.
