OPA615: ECL to TTL

laurent dupuy

Prodigy 10 points

Part Number: OPA615
Other Parts Discussed in Thread: SN65ELT21, SN65LVDS2

Tool/software:

Hello,

I want to use OPA615 and I need to control the Hold control (pin 7) with a 3ns positive pulse repeated at 100MHz

my clock is coming from an ECL output,

could you please help me concerning the ecl to TTL adaptation to control the Hold control pin of opa615 ?

Would you have a specific component that could help ? very fast transitions are needed.

Best regards

Laurent

4 months ago

0 Clemens Ladisch 4 months ago

Guru 311740 points

The OPA615's hold input requires the driver of a low-level signal to sink some current, but ECL uses open-emitter outputs.

ECL typically uses a negative supply. Are you using ECL, PECL, or LVPECL? What are the exact electrical characteristics of your clock signal, and what are the voltages relative to the OPA615's ground?

0 laurent dupuy 4 months ago in reply to Clemens Ladisch

Prodigy 10 points

Hi clemens,

My 100MHz clock source will come from the output of a Sy100EP195V programmable delay chip

This component is powered with a single 3.3V

For information input of this chip is configured in LVPECL

0 Clemens Ladisch 4 months ago in reply to laurent dupuy

Guru 311740 points

The SN65ELT21 is a PECL-to-TTL translator, but only for 5 V.

The application report DC-Coupling Between Differential LVPECL, LVDS, HSTL, and CM shows in figure 5 how to terminate LVPECL for an LVDS receiver (e.g., SN65LVDS2).

0 laurent dupuy 4 months ago in reply to Clemens Ladisch

Prodigy 10 points

Thank you Clemens, I will work on it

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OPA615: ECL to TTL