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TLV9102: Max. allowed voltage at output pin while in shutdown

Arttu Rasanen
Prodigy 80 points
Part Number: TLV9102

Tool/software:

Hello all, I hope you're having a nice day.

I'm planning to use TLV9102S dual op-amps in a kind of multiplexing application where an op-amp must be placed in shutdown mode. This application requires the output of the op-amp to be "de-activated" or high impedance state. While in shutdown, the output of the TLV9102S would be driven by some external circuit. TLV9102S seems to fit this purpose, as it has dedicated shutdown pins for each amplifier.

My question is: what's the maximum allowable voltage present at the output pin while in shutdown mode? I tried to read through the data sheet but could not find this information. It could be that I just didn't know where to look. Any help would be appreciated.

Thanks!

  • +1
    Guru 307120 points

    The body diode of the output transistor clamps the output to V+. So you must not try to exceed V+ + 0.5 V.

  • +1 in reply to Clemens Ladisch
    TI__Intellectual 2230 points

    Hi Arttu,

    The datasheet doesn't explicitly provide a maximum recommended voltage on the output pin in shutdown mode, but I would recommend keeping the output pin within the supply rails. If the voltage to the output pin is greater than the power supply, then the internal ESD diode connecting the output to V+ will turn on. This can damage the device is the current is not limited to less than 10mA by a series resistor. 

    For more information on the ESD protection circuitry, see section 7.3.6 Electrical Overstress of the datasheet.

    Best Regards,

    Alex Curtis