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OPA991: High-side current monitor unstable, but TL071 works, as does INA168

Holmer Grimm
Prodigy 10 points
Part Number: OPA991
Other Parts Discussed in Thread: LM321, TL071, , INA168, TLV9351

Tool/software:

Hello,

We want to put out a 4-20mA current (process control) from a filtered PWM.

Since we set it from a micro, it is low-sede, but we need a high-side output from 24V towards GND.

Using an opamp controlled NPN sink transistor with a PNP current mirror at 24V works fine, but error gets bigger (including 3 resistores plus 3x base current + beta variation + UBE mismatch).

So I added a high-side current monitor that puts out a small current towards GND, for feedback, see attached picture.

This corrects everything but R7 error and its own offset, if T2 is a FET. Using a bipolar would add some base current error, hence the BSS123.

It works with a TL071 for IC1 (input to V+) and LM321 for UC2, with just 1nF as C12 to tame the LM321.

To have the same part for both ICs, and get lower offset, we used OPA991 for IC1+IC2.

One or both opamps sometimes (!) oscillates wildly.

It works fine until you touch just about any node with a scope probe, then one or both ICs start oscillating and output current increases or descreases 20%. Removing the probe does not help then.

Using 1µF (!) for C12 makes IC2 stable, with IC1 still oscillating, but to my surprise  the output is correct. Seems it intergates out the oscillations.

Adding one of the hand drawn caps C20-C22 just changes the frequency, down from 3MHz to a few kHz. Using BC847 for T2 helps nothing, and it is not the supply either (rock stable).

If we replave IC1 with INA168 (other mods see pic), it works with C12 just 1nF. Why is the INA stable, and the same circuit with external R5+6 and T2 added not?

If this is not readable, I can post a PDF.

  • 0
    TI__Guru 70341 points

    Hi Holmer, 

    Could you post pdf version instead? the black ground schematic is hard to read. 

    From your description, you seem to encounter the op amp loop stability issues, which it needs to be compensate. 

    The following circuit is using OPA991 as a comparator, I am not sure that why you design in this way. What is your PWM frequency and signal from? --> from the right of the schematic. I assumed that you want to convert average of PWM signal to 4-20mA in current to drive an LED. 

    I will take a look once you sent me the pdf file. 

    Best,

    Raymond

  • 0 in reply to Raymond Zhang1
    Prodigy 10 points

    Hello,

    yes, we use filtered PWM from a microcontroller to set the current, and it can be slow. One second settling time is OK.TI-Frage.pdf

    I drag-dropped the PDF into this window, but I only see a PDF file symbol. Hope you see more.

    Regards, Holmer

  • 0 in reply to Holmer Grimm
    TI__Guru 70341 points

    Hi Holmer, 

    I am trying to understand your V to I in 4-20mA design intent. Here is my best interpretation what you are trying to do. Yes, this circuit requires some work in order to stabilize the loop gain. 

    Let us finalize the design first before we are checking for the loop stability. My guess is that you want to use difference amplifier as voltage feedback and use it as feedback. 

    OPA2991_4to20mA 05052025.TSC

    A different way to accomplish this is the following application note. There are other ways to construct V-I circuit as well. 

    https://www.ti.com/lit/ug/slau502/slau502.pdf?ts=1746472106833&ref_url=https%253A%252F%252Fwww.google.com%252F

    Please let me know how you want to finalize the circuit. 

    Best,

    Raymond

  • 0 in reply to Raymond Zhang1
    Prodigy 10 points

    Hi,

    thanks for the appnote, it is basically my current mirror version with an opamp in the mirror. The FETs eliminate both base current errors and beta variation, and the opamp makes gate voltage difference a non-issue (see below). Did not know that trick, just the Wilson mirror.

     

    I attached redrawn versions of our circuit, with Vcc caps and EMC parts removed to make them clearer. All three versions are included in one layout, with unused parts left off and others bridged as needed.

     Sink.pdf

    "Sink" is the previous version we built for years. Because it sinks a regulated current into GND, you need a floating supply since our GND becomes the positive input of e.g. a PLC. And you cannot use two of our units on one PLC, because the current will not know what path home to choose if they share the GND from the 24V supply.

     Source-with-Mirror.pdf

    "Source-with-Mirror" is the straightforward version with current sink and high-side mirror, putting out a positive 4...20mA. It works with any PLC.

    The error is bigger, since you have base currents, beta variation and UBE variation, plus three resistor tolerances instead of one. Using FETs is OK for the sink, but not the mirror. Gate voltage differences alone eat up your error budget. +/-50mV will give +/-0,5mA. The appnote circuit solves this with the opamp in the mirror (see above).

     Source-with-OP-Feedback.pdf

    "Source-with-OP-Feedback" uses the classical high-side opamp to put out a ground-referenced current as feedback for IC2. The parts in the rectangle equal an INA168 (because of the 0,5V input limit, you must reduce/increase R13/R14 by factor 5).

    In contrast to your proposal, which has two FB loops in series, this version has the two opamps cascaded in one loop. Even with both having 90 deg. phase margin, you end up with 180 deg. and oscillation. There are even two different frequencies, one in each loop, plus a stable mode until you touch a circuit node with a scope.

    With the OPA991 (chosen for low offset + bias, R2R in/out and 40V supply, to have the same part in both positions) I could stabilize the output with 1µF for C12, making IC2 a slow integrator. IC1 still oscillates wildly (close to a bang-bang), but IC2 integrates that out perfectly.

    With IC1=TL071 and IC2=TLV9351 (or MCP6001, LM321), oscillations stops if 100nF are put between the inputs of IC1. With INA168 replacing R5+6, IC1+T2, no such cap is needed at IC1 and just 1nF for C12 gives stability. I guess the INA is internally compensated for such applications.

     

    Anyway, we will settle for the current mirror and a FET for T1 this time, the application is fine with 5% full scale error. If we ever need a near-perfect version, I will consider your circuit instead of my crazy double loop.

     

    Thanks a lot, I think you can close this.