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OPA827: OPA827 charge amplifier saturates with large feedback resistor (about 68 MhOm) - works only with much smaller Rf

Part Number: OPA827
Other Parts Discussed in Thread: OPA828

Hello,

I am designing a low-noise piezo sensor preamplifier based on the OPA827, where the first stage is a charge amplifier for the sensor.

Problem summary:
When I use the intended large feedback resistor (Rf = 65 - 68 MhOm, Cf = 2.2 nF), the output of the charge amplifier saturates to the positive rail.
If I temporarily replace Rf with a much smaller value (about 560 khOm to 1.2 MhOm), the amplifier operates normally and amplifies the piezo signal, but the sensitivity is greatly reduced.

Circuit description

OPA827 powered from +-9 V (dual supply, verified at the IC pins).

Inverting configuration (charge amplifier):

Piezo sensor -> series input resistor (100 hOm) -> –IN

+IN tied to analog ground

Feedback: Rf and Cf (target Rf = 68 MhOm, Cf = 2.2 nF -> fc = 1 Hz)

Output observed directly with a scope (×10 probe).

I am attaching the schematic for reference.

What I have verified/tested

Power supply:
±9 V measured directly at the OPA827 supply pins. No missing or floating rails.

Device health:
The OPA827s themselves are functional. If I short -IN to OUT, the output immediately goes to about 0 V as expected.

Feedback integrity:
Rf is the correct value (about 65 MhOm measured), no open circuits.

Breadboard effects:
I initially tested the circuit on a solderless breadboard.
With very large Rf values, the amplifier saturates.
With a smaller Rf (≤1.2 MhOm), the circuit works.

DC behavior:
With a large Rf, even very small DC offsets or leakage appear to push the output into saturation.
This effect disappears with a smaller Rf.

Second stage isolation:
A second gain stage was originally connected, but it has been fully disconnected for debugging.
The saturation occurs already at the first (charge amplifier) stage.

My current understanding/question

I suspect that the saturation is related to DC leakage, bias currents, or parasitic leakage paths, especially when using very large feedback resistances in a charge amplifier configuration (possibly exacerbated by breadboard leakage).

However, I would like to confirm:

Is this behavior expected for OPA827 with Rf = 68 MhOm?

Are there recommended layouts or biasing techniques to make such high-value feedback resistors stable?

Would TI recommend a different approach (e.g., guarding, a different Cf/Rf ratio, or a different topology) for achieving an about 1 Hz low-frequency cutoff with a piezo sensor?

Any guidance or application notes would be greatly appreciated.

Thank you very much.

Screenshot 2025-12-13 211947.png

  • Hello, 

    Just to confirm.

    • You are looking for a gain of 53dB as shown in my simulation below?
    • I had to AC couple the circuit to work. Otherwise it saturates to the supply rail. Are there any DC potentials at the input source?

    Best Regards, 

    Chris Featherstone

  • Hello Chris,

    Thank you for the simulation.

    If I understand you correctly, in your simulation — with no intentional DC at the input source and without any AC coupling — the output of the charge amplifier goes into positive saturation. If that is the case, it is somewhat surprising for this topology when the input is purely capacitive, and no DC is applied.

    Regarding the gain: yes, I am targeting about 53 dB, since I need sufficient sensitivity to detect a very small charge from a piezo element.

    The input source is a passive piezo sensor (capacitive source with very high resistance), so in principle, there should be no intentional DC at the input. However, in practice, it seems that residual charge and especially leakage paths during breadboard testing make the circuit extremely sensitive when using Rf ≈ 68 MΩ, and the output tends to saturate.

    As a quick experiment on hardware, when I reduced the feedback resistor:

    • With Rf = 560 kΩ, the output DC offset was about 300 mV, and the amplifier operated,

    • With Rf = 1.2 MΩ, the output DC offset increased to about 600 mV, and the amplifier still operated.

    This suggests that the saturation observed with 68 MΩ is dominated by leakage and bias effects rather than a fundamental issue with the op amp itself.

    In your simulation, if you reduce Rf from 68 MΩ down to the 0.5–1.2 MΩ range, does the saturation disappear as well (with some DC offset appearing), allowing the charge amplifier to operate without AC coupling?

    I would prefer not to add AC coupling at the input of the charge amplifier, since a series coupling capacitor would form a capacitive divider with the piezo capacitance and reduce the charge sensitivity.

    Best regards,

    Konstantin

  • Hello, 

    Based on the values in your circuit, the target gain appears to be:

    • 68M / 100 = 680,000 V/V (or approximately 116.65 dB)

    However, the gain is set so high that I had to add a 1 TF capacitor to the front end to get close to it. Unfortunately, the circuit gain is approaching the open-loop gain of the device, which means it won't quite reach the full 116.65 dB. As you can see, the actual gain is approximately 113.93 dB.

    6138.Piezo Amp.TSC

    Signal Level and Gain Considerations

    To achieve a 5V output, the circuit would need to amplify a very small signal: 5V / 680,000 = 7.35uV. However, the offset voltage of the OPA828 is 75uV, which is 10 times larger than the desired signal.

    Typical Signal Levels for Piezo Sensors

    Typically, piezo sensors output signals in the millivolt range. If your sensor is similar, you may not need such a high gain. A smaller gain would be more suitable, as it would be more compatible with the typical output range of piezo sensors.
    If you do need the gain of 680,000 you may consider gain staging as shown below. The first gain is 1,000 and the second gain is 680. You can see that I get the full 116.61dB of gain. Using 1 amp alone won't be able to achieve this. 
    Alternatively you may consider using my JFET composite circuit shown in my application note below. 

    Best Regards, 
    Chris Featherstone
  • Hello Chris,

    Thank you for taking the time to run the simulations and share your recommendations.

    After reviewing your results and doing additional testing on my side (both on hardware and in simulation), I concluded that the main issue in my prototype was not an open-loop gain limitation, but rather the practical sensitivity of a high-impedance piezo/charge-amplifier front end to leakage and DC effects during breadboard testing.

    I have now implemented a more robust approach in my design (including proper modeling of the piezo source and AC coupling between stages), and the circuit behaves as expected in my measurements.

    Thanks again for your help and for the application note reference.

    Best regards,

    Konstantin

  • Konstantin, 

    No problem. Let us know if we can be of further assistance. 

    Best Regards, 
    Chris Featherstone