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LMH6518 reference designs

AT231
Prodigy 65 points
Other Parts Discussed in Thread: LMH6518, LMV841, LMV842, TINA-TI

Good evening,

I`ve been testing in the last couple of hours the given oscilloscope circuitry (Low Noise Amplifier + Input resitive divider) from the LMH6518 datasheet, and i obtained strange values. For instance, on the top loop (LNA), on the output (VIN+ for the LMH6518) i get a dc offset over the ac signal, of few hundred mV, wich i assume it shouldnt be there. Oh, and  the resistive divider is unstable from DC->1MHZ.

On page 31, it says the IN- is biased to 2.5v, due to the R6,R9 voltage divider. With a +5V power supply.  With R6 and R9 being 200ohms, you will get a 25mV bias.

I got some spice models for LMV841, and JFET MMBF5486, and i`m not sure its models related. Is the pspice model for LMV841/842 correct?

Has anyone tested the circuitry described in the datasheet?

Best regards,

Aurelian.

  • 0
    TI__Mastermind 22825 points

    Hello Aurelian,

    I've attached the schematic in question for reference:

    Here is a quote from you: "On page 31, it says the IN- is biased to 2.5v, due to the R6,R9 voltage divider. With a +5V power supply.  With R6 and R9 being 200ohms, you will get a 25mV bias."

    I'm not sure what you mean here! The LMH6518 "-IN" is high impedance! So, the R6, R9 voltage divider should result in 2.5V or 1/2 of 5V Vcc (little current flow in "Ro" and "R50"). Let me know what may be the disconnect / mis-communication between you and I?

    If the circuit operates properly, at "+IN" node you should get the "Scope Input" (AC + DC) waveform riding on top of a ~2.5V pedestal, set by R6, R9 divider and the circuit feedback. That is only true if the R6, R9 junction is at 2.5V (which obviously you are not getting). You can disconnect the LMH6518 from this circuit all together and troubleshoot it by itself for the proper node voltages.

    Please let me know and I will try to help further.

    Regards,

    Hooman

  • 0 in reply to Hooman Hashemi
    Prodigy 190 points

    Hi Arulein,

    Lmh 6518 reference design not working ., "+IN" output follow the Scope input without levelshift (2.5v).

    Help us to find solution .

    anbu ub

  • 0 in reply to Anbu M
    TI__Mastermind 22825 points

    Hello Anbu,

    Some questions so I can try and help debug:

    1. I am assuming that "LMH6158 -IN" is in fact 2.5V.

    What is the voltage at R1, R3 junction (lower LMV842 output pin)? It should be around -2.5V (assuming you have not applied any "Offset Control DAC" to R4.

    2. What is the DC (average) voltage of what is being applied to "Scope Input"? If 0V (or left open), then R1, R5 junction should also be 0V.

    3. What is the voltage at R22, R15 junction (upper LMV842 output pin)?

    Regards,

    Hooman

  • 0 in reply to Hooman Hashemi
    Prodigy 190 points

    Hello Hooman,

    Thanks for your immediate reply.

    1. I am assuming that "LMH6158 -IN" is in fact 2.5V.

    What is the voltage at R1, R3 junction (lower LMV842 output pin)? It should be around -2.5V (assuming you have not applied any "Offset Control DAC" to R4.

    anbu:  Yeah , iam getting 2.5V

    2. What is the DC (average) voltage of what is being applied to "Scope Input"? If 0V (or left open), then R1, R5 junction should also be 0V.

    anbu:  Input is grounded(0v), also iam getting 0 V at junction R1&R5

    3. What is the voltage at R22, R15 junction (upper LMV842 output pin)?

    anbu:  Output oscillating with positive and negative rail with 1khz freqency rate.

    Note: iam giving +/-5 volt for bootstrap section(FET supply). 


    Please advice ..

  • 0 in reply to Anbu M
    TI__Mastermind 22825 points

    Hello Anbu,

    The answer to my question #1 above should have been -2.5V measured (not +2.5V). Are you measuring +2.5V- if so, that would be an issue.

    For question #3 above, the upper LMV842 output pin should not be oscillating at 1kHz and it should have a value of about +2.9V in steady state. Have you made sure the 100nF (C3) is in place?

    I've put the circuit into TINA-TI so that you can at least confirm some of the DC voltages for now:

    Also here is the simulation file itself for you to work with an hopefully find out what might be the problem:

    6170.LMH6518 JFET Input Buffer Hooman 2_5_14.TSC

     

    Regards,

    Hooman

  • 0 in reply to Hooman Hashemi
    TI__Mastermind 22825 points

    Hi Anbu,

    I have used the TINA-TI "DC Analysis", "Table of DC Results" to show what each node DC voltage should be. Please follow the node names and the simulated node voltages shown below, to trouble shoot your circuit.

    Node Voltages:

    4278.LMH6518 Node Voltages Hooman 2_6_14.xlsx

    Regards,

    Hooman

  • 0 in reply to Hooman Hashemi
    Prodigy 190 points

    Hello Hooman,

    Happy day...

    i found the problem that the feedback resistor 500k path is open (resistor pad damaged). corrected and now working fine. +IN is level shifted with 2.5v + input signal, -IN is level shifter with 2.5v

    Also i observed the when we reduce the FET supply (Vcc2 (+10V ) to 5V) the output level shift reduced to 1.6 volt. 

    1. It is must we need to operate the +10 V(Vcc2) and  -10 (Vee2) for for FET supply ?  shall i operate +/-5 supply ?

    2. Also i observed that if i apply greater that 10Mhz(Sine) to as input , the gain increased. This front end will support 100Mhz bandwidth with gain flatness ?  Here i attached the signal chain for your reference.

    Looking your advice .

    Anbu M

  • 0 in reply to Anbu M
    TI__Mastermind 22825 points

    Hello Anbu,

    Glad to hear you were able to make the circuit work. To answer your questions:

    1. Use the +/-5V for the JFET biasing: I think if you do that, you would not have any headroom (positive Drain to Source biasing voltage), especially in the presence of a positive going signal. You will probably also affect noise (by having to lower the J8 current) and bandwidth due to higher device capacitance.There may be other subtle effects as well. The LMH6518 "Reference" shows the book where there is more information on this type of Wideband amplifiers:

    'Wideband amplifiers by Peter Staric and Erik Margan, published by Springer in 2006. (Section 5.2)."

    2. Bandwidth: It should definitely be much higher than 10MHz. Did you make sure you have a tight / low capacitance layout around the critical nodes? Remove ground plane (at surface and inner layers both) around the sensitive nodes to lower capacitance. Are you measuring after the LMH6518 (that would be the best to make sure your probe is not loading the output of this LNA)? Make sure your probing itself is not causing bandwidth roll-off.

    I don't know what else to suggest but to make sure you observe good high frequency techniques in layout and probing.

     

    Regards,

    Hooman

  • 0 in reply to Hooman Hashemi
    Prodigy 90 points

    Hi Hooman

    The datasheet for the LMH6518 states an absolute max differential input of +/-1V (page 2), the application circuits do not provide any protection beyond current limiting with the 100R resistors.

    Do the inputs have internal protection diodes to clamp the differential signal to +/-1V ? If so how much current can they take?

    If not would you recommend that these are added to prevent damage?

    Regards

    Lee

  • 0 in reply to Lee Szymanski
    TI__Mastermind 22825 points

    Hello Lee,

    The LMH6518 input pins do not have internal diodes for protection. So, if your inputs can experience conditions that exceed the +/-1V conditions, the protection circuitry / components should be provided externally.

    I think that with the LMH6518 BJT inputs, the main risk is with long term large differential voltage (which could degrade offset voltage at prolonged time-periods especially at high temperature), and transient differential voltages which may exceed the +/-1V values are less of a concern.

    Regards,

    Hooman

  • 0 in reply to Hooman Hashemi
    Intellectual 480 points

    I realize this thread is old, so apologies for piggybacking. But since the spice is included, it seems appropriate. 

    In the LMH6518 spec, the circuit in fig 69 (which has the spice posted in this thread) the text seems to indicate that the low frequency path covers DC to just  a few  Hz, which is determined by C3 in Fig 69. 

    But if I remove cap C1 (in spice), same as C7 in fig 69, to isolate the low freq path and look at the AC response, the response of the low frequency path extends from DC to beyond 100K. And if I leave that cap in and short + input to the opamp to isolate the high freq path, then I see the AC path has a lower corner at 16 Hz.

    So, my question is: why does the low frequency path go from DC to more than 100K, when you'd expect to just slightly overlap the high frequency path? And that is also what the text in the LMH6518 spec suggests too.

    I realize that if they overlap there isn't much of a problem, because both should be driving the same signal into the JFET. But I'm curious why the LMH6518 spec suggest the opamp contribution quits after just a "few Hz". And in fact, changing the C2 cap (spice refdes) doesn't do anything, really, wrt low frequency path corner.

    Thanks

  • 0 in reply to SeattleEE
    TI__Mastermind 22825 points

    Hi,

    That LMH6518 circuitry (Figure 69) comes from the Reference book listed in the datasheet:

    "Wideband amplifiers by Peter Staric and Erik Margan, published by Springer in 2006. (Section 5.2)."

    Maybe you can do a deeper dive by getting the book (this E2E post lists some sources):

    Sorry if I am not being of much help right now. If I come up with any good responses to your questions, I'll return here to post.

    Regards,

    Hooman