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INA206 comparator pullup voltage

Ken Ishiguro
Prodigy 110 points
Other Parts Discussed in Thread: INA206, TLV3404

I am using an INA206 operating at 5V.   The comparator output pin is pulled up to 40V through 160k.  I overlooked that absolute max voltage on comparator outputs is 18V on the datasheet. 

On the actual hardware, the output is 5V in open drain mode.  I assume internal output diodes are clamping voltage to Vs= 5V.  Is this allowable since current into the pin is only 0.25mA and voltage is clamped?

Also, the old design uses TLV3404 comparators in the same arrangement.   Its datasheet does not specify maximum voltage on the outputs.  Why is it unspecified?

  • 0
    TI__Expert 6930 points

    Hi Ken,

    I am responsible for the INA206...since you never apply more than the ~5V to the CMP output pin this should be OK.  You are not violating the ABS max...I am am guessing that the part would not have been designed with this mode of operation in mind as a typical use case, so let me check as to just why it is limiting to ~5V and come back to you...I will have to review the internal schematic.

  • 0 in reply to Edward Mullins
    Prodigy 110 points

    The voltage on the comparator output pin is actually 5.43V.  This could be the supply voltage plus a diode drop from an output protection diode which is doing its job by clamping the output from going even higher.  Will be interested to know root cause.

    Need to know if the 250uA current into the pin is OK (hope the pullup resistor is never wrong in assembly or shorted during testing!) and the max allowable current into the pin when "floating".

    Also can you confirm the output structure of the TLV3404?  The datasheet is unclear w/ no max voltage specified, but seems to be a true open-collector output with no current path.

    Thanks for the help!

  • 0 in reply to Ken Ishiguro
    TI__Expert 6930 points

    Hi Ken,

    I have uncovered some potentially conflicting information regarding any internal ESD diode clamps...so rather than speculate I will take an INA206 into the lab and make a few measurements to confirm what you are seeing...I should have this complete by tomorrow sometime.

  • 0 in reply to Edward Mullins
    Prodigy 110 points

    Thanks Ed, I emailed you a marked up page of our schematic that may help.

  • 0 in reply to Edward Mullins
    Prodigy 110 points

    Hi Ed,

    Do you have any update on this?  Also did you receive the schematic I sent via e-mail?   I need to get the necessary design changes under way.  Thanks!

  • 0 in reply to Ken Ishiguro
    TI__Expert 6930 points

    Hi Ken,

    The safest change is to tie the pull-up to Vs and not to the 40V...is this an option?  I replied to your email with a little additional detail...

  • 0 in reply to Edward Mullins
    Prodigy 110 points

    Thanks Ed, replied to your detailed email.  It explains why the output must completely float.   One question is whether 40V is permitted if current is limited to 250uA.  If not, an isolation FET needs to be added.  But still need to understand why the output is clamped to ~5.15V and why the TLV3404 output fully floats to 40V.