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LMV611/2/4 additional parameters

Other Parts Discussed in Thread: LMV611

Hi, with single supply 3,3V, as voltage follower, I wonder:

(A) Is it guaranteed to be latch-up free up to some current? At least 10mA would be nice. Note: It can have this input current both when supplied with +3,3V and when supply is 0V in out design.

(B) Is it prone to "phase reversal"? We would like to be able to apply up to 13V via 50kohms to the non-inverting input, it is ok then if the output is locked to any rail, and it would also be ok if any input voltage between 3,3V and 13V could only cause the output to be locked to either rail, but it is not ok if phase reversal causes the output to be in between 0 and +3,3V.

(C) There are only typical figures on bias and offset current in the datasheet. Is it ok to assume a factor 2 for worst case at room temp and another factor 2 for temp drift, i e IBIAS < 60nA and IOFF < 32nA at 85degC? (Actually even a bit more than this would be ok, up to IBIAS < 80nA and IOFF < 200nA at least, but a factor 4 to me seems about right for an OP amp).

PS We are a big customer but since design is done by a subcontractor and I am a consultant, I have no good way of support via a distributor, this forum seems to be the quickest way.

  • HI David,

    (A) Yes. All devices are subjected to latch-up testing as part of the release qualification process, where a specified current is applied to each pin. JEDEC standards are 100mA test current. The LMV61x was tested to 300mA - 3x more. 10mA should not be a problem...

    Current for the LMV series should be limited to under 10mA. The less the better. I recommend under 1mA or less. External diode clamps should be used if these conditions are expected to occur frequently or for continuous periods.

    When the power is off, the ESD diode will clamp to the supply. Occasionally this can cause the supply bypass caps to charge up until something on the supply line conducts and discharges them. So be aware that the supplies may "Tic-Tic" during this condition if enough current is available.

    (B) It should not reverse. Recent designs are checked to make sure they do not phase reverse within the supply range, even when outside the specified common mode limit.

    Above V+, the ESD diode will clamp the input voltage to the V+ supply, so the input voltage will only be about 500mV above V+ at most. Generally you need to force the inputs a few volts above V+ to get reversal, but by then the ESD diodes are in full conduction with very high currents (10's to 100's of mA) - not a typical condition.

    Your series 50K will limit the current to (13V-3.3V)/50k = 200uA, well below the maximum input current so you should be fine.

    (C) The LMV611/2/4 is the untrimmed, looser spec, "low cost" version of the LMV931/2/4 (same die). You can use the over temp bias current numbers from the LMV931 datasheet as a guideline, but keep in mind that the bias current is not guaranteed for the LMV61x family.

    Also, the LMV93x devices are bipolar input with input bias-current cancellation - where an internal parallel device sources an opposite amount of bias current, thus canceling the majority of bias current. You can tell this because the bias current and offset current specs are almost identical. This also means that the bias current can flow positive or negative - depending on the cancellation occuring at the time (the bias current numbes are a ± number).

    In non-bias cancelled inputs, the offset current is usually about 10x less than the bias current.