Because of the Thanksgiving holiday in the U.S., TI E2E™ design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

XTR110 Offset adjustment

Other Parts Discussed in Thread: XTR110

Hi all,

 I'm testing this device to meet an output current between 0 and 600 mA for a X - 10V voltage control, where X is a TDB value which probably is in the 2 - 4 V range, the supply is 24 V. The tested circuit is the same as figure 5 (with sense resistor between 13 and 16) in datasheet but full-range extended span is used, removing resistor R4 between pins 2 and 9. Span adjustment works fine but I tried different offset potentiometers (20 K, 50 K, 100 K) and the maximum voltage offset adjustment at the output is around 117mV (when the target voltage will be much above).

The datasheet doesn't give much information about offset operation. I also have read another post where offset range was very poor, could you confirm the offset range adjustment for this configuration? Is it possible to obtain a higher offset range?

Thanks,

Regards.

  • Hello Jose,

    The offset trim circuit in the XTR110 is not meant to provide volts of offset to account for input signals that do not have a zero-scale level of 0V.  The offset trim circuit is designed to correct for around 100mV of offset due to circuit and external component inaccuracies, which is close to the levels you're measuring. 

    In order to get your design working as desired you'll have to design a simple circuit that level shifts and adjusts your input signal to 0-5V or 0-10V for easy interfacing with the XTR110 input signals.  Use the circuit attached below to understand the basic functionality of the XTR110 IC.  This is not an "official" SPICE model so it will not accurately depict the error sources and some limitations that will be present in the actual XTR110 device, so be sure to abide by the input and output limitations of the device in your final design.

    1526.XTR110.TSC 

  • Hi Collin,

    Thanks for your comments, the advantage of using this IC was to avoid adding more circuitry by using these adjustments, the problem is that I dind't find (maybe this information appears in datasheet but I didn't find it) any offset additional information related adjustment range and figure 6 and zero adjustment procedure don't help to understand this limited operation, it seems like any span or offset adjustment can be performed, as a suggestion it would be great to clarify this in datasheet.

    Thanks anyway,

    Regards.

  • Thank you for this feedback Jose. There is only one small note in Figure 6 that states an offset correction of +/-1.8% of the SPAN which is easy to miss. Next time we update the datasheet we'll add a sentence or two about the offset correction.
  • Hi Collin,

    Then, the offset correction is 1.8 % of SPAN, and SPAN is 20 mA, but it says that offset adjustment is 4 mA which is much higher than 1.8% of 20 mA. At said this datasheet is not very useful in terms of offset operation. Moreover adjustment of zero paragraph says that you need to adjust using R1 the offset of 4 mA.

    Anyway it doesn't matter, but it would be great to include or correct some offset information.

    Regards.