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TINA/Spice/TLV1701: TLV1701 Simulation

Part Number: TLV1701
Other Parts Discussed in Thread: TINA-TI, LM2903,

Tool/software: TINA-TI or Spice Models

Dear All

I am having problem simulating correctly a latching comparator circuit in LTSpice using the PSpice TLV1701 model available from TI. The circuit just immediately comes up in the latched state. Since the input to the circuit is a ramp the correct operation would be for the circuit to latch only when it crosses the reference threshold. Incidentally if I substitute the comparator with an LM2903 model the circuit simulates correctly. Is this an issue of using a PSpice model in LTSpice or something inherently wrong in the TLV1701 model or something else? Any insight into the matter would be greatly appreciated.

Regards

ik

  • Hello Imtiaz,

    We can only provide limited troubleshooting with LT Spice due to their user agreement. Our preferred tool is TINA-TI.

    A latching circuit can be tricky since you do need to set an initial condition at start-up - SPICE does not like "random".

    The LM2903 model is very, very simple - only a few lines. So it is a bit more "predictable". The TLV1701 model is much more complicated.

    Try simulating with the initial conditions set to zero - instead of trying to have the engine calculate the steady-state conditions before simulating.

    In the menu  SIMULATE -> EDIT SIMULATION CMD , in the Transient tab, check the "Start External DC supply voltages at 0V" and see if that makes a difference.

    Also look in the logs (VIEW-> SPICE Error Log) to see if it is having problems (LT Spice tends to ignore things it does not understand which causes strange behaviors).

    Please post the schematic or the LTSpice file, or try your circuit in TINA-TI.