Other Parts Discussed in Thread: TINA-TI
Dear all,
Unfortunately I am facing a issue on this circuity
On explicated case the signal VM1 is going to 1000mV offset.
Could someone has an idea ?
Thanks in advance
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Hi,
If you have a DC level at the driven input (VG1) where the un-driven input is tied to GND, then it is possible for the DC voltage to manifest itself as differential output offset due to the 45V/V gain in the circuit. You may want to see whether applying a positive or negative offset at the input helps reduce this differential output offset seen at VM1.
It would really help if you could provide a bit more information on the input signal levels in-order to help debug further.
Best Regards,
Rohit