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TINA/Spice/INA169: TINA model indicates several uA ouput current with zero input. Is this actually how the IC behaves?

Aidan Walton
Expert 1095 points
Part Number: INA169
Other Parts Discussed in Thread: TINA-TI, , LM5085

Tool/software: TINA-TI or Spice Models

Hi, I'm trying to design with the INA169 for use in a relatively high speed current control feedback loop. I require bandwidths well into the 100s of Khz, and the INA169 if operated with a low output gain (RL = 1K) can deliver the required performance and seems to be the only current sense architecture that achieves this bandwidth with the high Supply voltages I'm using (60V). However when I simulate with TINA, I see an output current in the order of 25uA, when I have zero input. I verified this with the input pins shorted as well as in circuit. 

I need to amplify this output and must keep the gain of the INA169 very low in order to achieve the required bandwidth for the loop. Therefore to overcome this offset I will require a precision offset circuit, adding delay and noise, therefore I would like to avoid if possible.

Before I proceed further, could you please confirm that this output error (quiescent output current) is actually real, does the actual component do this? In the datasheet I only see details for output error as a percentage of differential input. This clearly shoots off in a negative manner as Vin falls towards zero. However if this error is a percentage of zero then it should theoretically be negligible. This is not what I see when I model in TINA.

What does the real IC do?

Thanks

Aidan

  • 0
    TI__Mastermind 40295 points

    Aidan,

    Would you please attach a TINA schematic file that illustrates the behavior you described?

    Regards,
    John

  • 0 in reply to John Miller - Sensing
    Expert 1095 points

    INA169_Zero_I_ramped_CM_V.TSCYes, please take a look. Actually while putting this together for you, I noticed a clearer view of what seems to be unusual behaviour. Perhaps an artefact of TINA. However you will hopefully see that if you connect the inputs across a sense resistor and then ramp the CM voltage on the INA169, the output current ramps up until CM voltage reaches 1.24V then suddenly drops to near zero as expected. However as you can see the ramp is very significant...up to 350mV across a 1K Rl. ~ 350uA.

    Seems strange, and is causing me impossible confusion in my simulation. As I'm trying to use the INA169 to simply level shift the Vsense. I could of course raise Rsense to make this less significant, but this comes at an obvious power cost and I don't think this behaviour is real. Hence the question about the model.

    Aidan

  • 0 in reply to John Miller - Sensing
    Expert 1095 points
    Further to my last post. I have worked around the problem, successfully, by using a controlled source to blank (set to zero) the output from the INA169 when it's CM voltage is < 2V. When I do this the simulation runs successfully. The reason this is causing me a problem is that due to the fact I must amplify the output from the INA169 before I apply it to the FB pin of a switcher (LM5085). Without blanking out this weird output the switcher stays permanently off, as the amplified version of the INA169 output raises the FB signal above the set-point and switches of the LM5085. With the blanking in place the LM5085 runs and raises the CM voltage, in just 1 cycle. Once the CM voltage on the INA169 is higher than this 1.25V point the model works as expected, FB functions and I can use the LM5085 as a current regulator. Which is what I'm working on.

    1.25V seems suspiciously close to a bandgap voltage. ????

    If you can confirm that this is a problem with the model then I would feel more comfortable trusting the simulation before I proceed.
    Aidan
  • 0 in reply to Aidan Walton
    TI__Mastermind 40295 points

    Aidan,

    I was able to reproduce your observation with the TINA schematic you posted to the thread.
    Thank you for that.

    The INA169 Pspice model shows the same behavior, so it doesn't appear to be a TINA artifact.

    The text header at the top of the model netlist says the model supports the input range, which is given in the data sheet as 2.7V to 60V.
    My guess is the original goal for the model was to support the recommended input range, so it may not be particularly robust outside of this range.

    This approach is (kind of) normal for our models.
    We don't try to capture failure modes - like ESD-induced failures - or device operation outside of the Absolute Maximum Ratings given in the data sheet.
    Most of the time we stick to modeling within the Recommended Operating Conditions.
    You can usually find a list of the model's features and operating conditions in the text header at the top of the model netlist.
    So its always good to look at that before running comprehensive simulations.

    Please let me know if you have any more questions or concerns.

    Regards,
    John

  • 0 in reply to John Miller - Sensing
    Expert 1095 points

    Thanks John,

    I appreciate you suggestions and will take them into consideration as I work with TINA. 

    In regard to the design I am working on, would it be possible to give any details about how the actual IC behaves when CM is below this 2.7V level. I realise it is out of spec, but it is not a small error. It's huge, and in my case causing me problems.

    Aidan

  • 0 in reply to Aidan Walton
    TI__Mastermind 40295 points

    Aidan,

    The product line experts are the best source of information on the actual device behavior.
    I will transfer this thread to their forum where they can comment.

    Regards,
    John

  • 0 in reply to John Miller - Sensing
    Expert 1095 points
    Thanks again John, let's see what they have to say.

    I thought this behaviour might have been related to the CMRR, which I tested extensively yesterday. The model does a pretty good job of matching the datasheet CMRR versus freq characteristics. This in my case is quite important, as the INA169 is sitting just after my power inductor of the switcher. This means that during initial start up the CM voltage shoots up from 0 to the output voltage which is anywhere between 40 and 60V. So in this case the CMRR is critical. I see an initial bump from the IC when this happens, which unfortunately switches off the switching controller. However it recovers within a couple of cycles as the output voltage settles down to just a few 10's mV ripple. This understood, it can be accepted.

    However the steady state error that I was seeing is different. It only happens when the CM voltage is below 1.25v, and this is a little unpredictable as the switching node is floating between the switching MOSFET and a reverse current protection MOSFET controlled by an LM5050. Therefore at power up this switching node initially rises to a few hundred mV, and in the simulation sits there.
    In reality it's sitting at a potential in balance between the leakage currents of the MOSFETs + LM5050 and the input bias current into the INA169 and the FW diode of the switcher.

    It just happens that this stabilises around 300mV, so this steady state error from the INA169 is seen sitting on its output. As I said this output voltage feeds back to the switch controller, and if it rises above 1.25v, it stops the switch controller from starting.

    If this output error from the INA169 is real I have to find a solution. If its not I'm getting carried away in the details. Hence why I'm looking for a definitive answer.
    Aidan