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LMH3401: LMH3401 maximizing output voltage for pulsed input

Part Number: LMH3401

Hello e2e,

Follow-on questions from https://e2e.ti.com/support/data-converters/f/73/p/772076/2857052

1) Please consider this circuit:
           _______         ___________
Signal----|       |--40Ω--|           |

          |LMH3401|       |ADC12DJ3200|
VDC--50Ω--|_______|--40Ω--|___________|
|
v

In my design I want the average voltage presented to the LMH3401 inputs to be different. That's because V_IN+ is not symmetric, i.e. the voltage duty cycle is far from 50%. In other words, the DC voltage of V_IN+ - V_IN- is far from 0. Does it cause problems in the amp to not have a balanced input like that? 

2) Please consider this circuit:
           _______     ___________
Signal----|       |---|           |
          |LMH3401|   |ADC12DJ3200|
VDC--50Ω--|_______|---|___________|
|
v

If one connects the LMH3401 V_OUT+- directly to ADC12DJ3200 INA+- without 40 Ohm resistors on a board (trace length < lambda / 10) thus bypassing the 40 Ohm resistive loss, would the 0.55 voltage loss from the 40 Ohm resistors be improved to ~1 in practice? Would this circuit work in practice for broadband inputs? What would be the deviations from specified performance?

  • Hello,

    1) What is the DC voltage at each input node and what is the amplitude and frequency of your signal?

    2) Keep in mind there are still the 10 ohms resistors internal to the device at the output. Therefore with the 40 Ohm resistors you would have a 0.5 voltage loss and a 0.83 loss without.

    Best,
    Hasan Babiker
  • Hello Hasan,

    1)
    IN+: DC = 0.28 V | Vp = 0.11 V, f = 4 GHz
    IN-: DC = 0.45 V | Vp = 0

    2)
    For clarification, you are saying that the 10 ohm resistors internal to the device cause a 0.83 voltage loss? So for example page 6 of SBOS695A states that the typical Differential Output Voltage is 5.6 Vpp. Is that voltage seen at the output of the amplifier within the device, or at the output of the device including the 10 ohm resistors?
  • Hello PTD,

    1. Yes the device should be able to work in this way. Keep in mind, however, that the difference in your DC voltages will be gained and reflected in your differential output. Your signal source should also have a 50ohm impedance so the impedances of both sides of the circuit are balanced.

    2. In your original question you mention removing the 40ohm resistors to prevent a 0.55 voltage loss. I assume your reasoning behind this is because you have a 100Ohm load from the ADC, and so there will be a voltage division. If this is the case, I was noting that you still have output resistors internal to the device and so there will still be a voltage division between these resistors and the input impedance of the ADC.

    Best,
    Hasan Babiker
  • Hello Hasan,

    1. Sounds good thanks.

    2. There will still be a voltage division, but where is the maximum output of 5.6 Vpp in the datasheet referenced to?

    Is A or B right?

    Answer A) 5.6 Vpp is referenced INTERNALLY; i.e. to the output of the amplifier, but before the 10 ohm resistors.
    --- FOR NO MATCHING RESISTORS: 5.6 Vpp output is divided between 10 ohm and 50 ohm, resulting in 5.6 * 50 / (10 + 50) = 4.67 Vpp reaching a 100 ohm differential load.
    --- WITH 40 OHM MATCHING RESISTORS: 5.6 Vpp output is divided between 50 ohm and 50 ohm, resulting in 5.6 * 50 / (50 + 50) = 2.8 Vpp reaching a 100 ohm differential load.

    Answer B) 5.6 Vpp is referenced EXTERNALLY; i.e. after the 10 ohm chips, i.e. the output of the device.
    --- FOR NO MATCHING RESISTORS: 5.6 Vpp output is seen directly by the 100 ohm differential load.
    --- WITH 40 OHM MATCHING RESISTORS: 5.6 Vpp output is divided between 40 ohm and 50 ohm, resulting in 5.6 * 50 / (40 + 50) = 3.1 Vpp reaching a 100 ohm differential load.

    Thanks,
    PTD
  • Hello PTD,

    Answer A. This is explained further in section 8.1 of the datasheet.

    Best,
    Hasan Babiker