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LM318-N : LM318-N maximum supply voltage range

Part Number: LM318-N
Other Parts Discussed in Thread: LM318,


My client is using LM318N in the following circuit.

The power supply is as follows.

Is this the level at which the IC Spec is OK? Or is the power supply out of the Spec range?

The data sheet of the same series, LM318, of this product gives a reference to the medium voltage as shown below

"All volume values, unless otherwise, are with respect to the midpoint between VCC+ and VCC–."

Please check it.

Thank you

Best Regards

From Anthony.

  • Hi Anthony,

    unfortunately, the schematic is not complete. So, it's difficult to give a proper answer.

    Datasheet of LM318 says that the input voltage must stay 3.5V away from the supply rails. By other words, the allowed maximum common mode input voltage in your circuit would be 5.2V - 3.5V = 1.7V. But your input voltage is higher and violates this specification.

    Datasheet of LM318-N says that the OPAmp must not be hard-wired as voltage follower. See figure 42 of datasheet of LM318-N. But the circuit arround U11 violates this recommendation.

    Last but not least, it's no good design practise to directly connect a cap from the output of OPAmp to signal ground. This can destabilize the OPAmp and make it oscillate.

    The LM318 is a dino under the OPAmps. I would strongly recommend to use a newer OPAmp.

  • Hi Anthony,
    I agree with Kai as well. One more thing I would add on to that is that you're also violating the absolute maximum rating for "VCC-". You cannot go lower than -20V because this may damage your device.

    Best Regards,
    Bala Ravi
  • Hi Anthony,

    LM318 is a 40V device, so a supply of +5 and -25 is fine. The ±20V limit is assuming a symmetrical split supply.

    The reason it is not recommended to hard-wire the follower is because the input has clamping diodes across the inputs to protect the "delicate" input transistor B-E junctions (see abs-max note 4 and the internal circuit diagram).

    Large differential voltages can occur across the inputs when there is a fast step-change to the input and the output races (slews) to catch-up. Current into the inputs must be limited (<10mA or less) during this time to protect the diodes, which is why there is always a minimum 10k resistor on the inputs in the example circuits (fig 42).

    As Kai said, do not put a cap on the output. Filtering should be done in the input side. And if you must put a cap there, it should be a non-polar capacitor if you cannot guarantee the output voltage will always be negative. I would move the cap to the MMI_VO line and size it appropriately for the time constant.
  • Thank you very much for your good comments.

    In fact, my customers are already producing products with the above circuit,
    But recently, there has been a problem that unwanted voltage is output.
    Normally, the output voltage of u11 is about 19V, but the problem is that the output voltage of the problem board is about 22V.
    We are worried about whether this is a defective product or whether it is possible to improve it by changing the circuit.
    Could you recommend a more suitable OP-AMP or circuit change to solve this problem?

    Thank you
    Best Regards.

    From anthony
  • Hi Anthony,

    you mean -19V and -22V and not 19V and 22V, right?

    What is connected to the left of R41?

    What is the excat input signal at the pin "LCD contrast"? Is it a true DC signal? Or does it contain AC components from the PWM? Can you show a scope plot of this signal?

    And why is the lower terminal of C46 connected to "VLCD" instead of signal ground?