Other Parts Discussed in Thread: OPA192, OPA835
Hi, I want to ask that why the slew rate increases as the capacitive load increases?
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I presume you are looking at that kind of odd front page plot.
People confuse slew rate with rise time often. That plot might have been a small signal non-slew limited measurement with increasing cap load where increasing the cap load was reducing the phase margin creating an apparently faster rise time, converted to an increasing "slew rate" here erroneously - just a guess.
There is a pretty thorough discussion of relating linear rise time to slew rate in these two articles - probably more than you want, but this explains it. This is surprisingly confusing and folks doing data sheets get this wrong all the time - which doesn't help. Just a quick summary for what is in here - a slew limited edge by definition is a fixed dV/dT - rise time won't give that to you and in fact underestimates the peak dV/dT on a 2nd order non-slew limited step by quite a bit.
The graph Michael refers to is correctly labeled and is NOT small signal settling. The graph shows Slew Rate vs. Load Capacitance for a large step input voltage.
The TLV9052 uses slew boost to increase the slew rate of the device. When the inputs of the op amp get pulled apart enough slew boost kicks in to increase the slew rate of the device. I believe that the slew rate is increase with load capacitance because the load capacitance causes the inputs to be pulled apart more for a longer period of time causing the slew rate to increase and be "on" longer. For an explanation on slew rate I recommend watching our TI Precision Lab videos on Slew Rate.
So any idea what the step size and input edge rate for that plot, it is a bit unusual and I am not sure how you would use it - buried in that time waveform I would also expect the time waveforms to vary quite a lot increasing cap load
The TINA model can be found in the Tools and Software tab on the product webpage.
If you have any additional questions. Please let me know.
Hi Tim, hi Michael,
in my simulations the slew rate decreases from 15.7V/µs to 14.4V/µs when increasing the load capacitance from 0pF to 350pF:
The graph represents the correct performance of the device. That the slew rate increase with cap load. Yes, there will be more overshoot with a higher cap load, as it will be with any amplifier.