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OPA2170: About the load on the amplifier output

Part Number: OPA2170
Other Parts Discussed in Thread: LM7705, OPA2990

Hi Team,

My Japanese customer has a question about OPA2170AIDCU. The question is below:

This op amp is used as a voltage follower for the buffer before and after the voltage dividing resistor in a product currently under development by our company. It is a circuit that converts 0 to 13 V analog input to 0 to 3.3 V by voltage division and connects it to the analog port of the microcomputer (R5F100EHANA # U0), but the voltage input to the analog port is differnet from the designed value. When the pull-down resistor 10kΩ is inserted into the amplifier output after voltage division of the above circuit, if the analog input voltage is 7V or more, the design values are met, and when the pull-down resistor 1kΩ is inserted, all the design values ​​are met.

Why do pulldown resistors improved and smaller resistance values ​​improved better, can you give us your view on possible causes and possibilities?

Circuit diagrams, measurement data, etc. are summarized in the attached file. Can you confirm it at the same time?

Analog AD Conversion Confirmation_190521.xlsx

BR

Tom.Liu

  • Hi Liu,

    see section 7.2 of datasheet and have a look at the "common-mode voltage range" and "voltage output swing from rail" specifications. So, your 13V input voltage is too high and the output of OPA2170 cannot fully go down to 0V, either. I would decrease the input voltage (eventually by using a voltage divider) and would think about using the LM7705.

    Kai
  • Hi Liu,

    This issue is likely not what Kai has mentioned. The OPA2170 has a specified common mode voltage 2V from the positive supply but it can operate rail to rail with degraded performance, such as an increase in offset voltage, because it uses a complementary-pair input stage. I recommend reading "Op amps with complementary-pair input stages: What are the design trade-offs?" for more information. I would not expect ~0.5V of offset and the increase in offset would only occur above input voltages of ~11V, whereas it appears that this issue occurs below ~7V.

    Is there anything else connected to the output of the S1_Analog?

    Have you looked at the output of the second op amp using an oscilloscope? An oscilloscope would be able to tell you if the output is oscillating. I recommend applying a small step input to the circuit and looking at the output to test for stability.

    Is the graph labeled "After_A" and "After_B" the results with a 10k and 1k load, respectively?

    Are the measurements taken using the A/D converter or a DMM? For troubleshooting purposes I recommend removing the connection to the A/D converter and only using a DMM to take the measurements.

    I'm going to go into our lab and connect up the circuit to see if I can replicate the issue.

    Lastly, I recommend taking a look at the performance of the OPA2990 which is a high voltage rail-to-rail input device. The OPA2990 will be able to meet datasheet specifications with an input voltage of 13V.

    Thank you,

    Tim Claycomb

  • Hello Lui,

    Check pin 4 voltage (at the pin) to be sure it really is grounded well, 0V.
    I see no other reason that pin 1 would not follow pin 3 voltage to ground (within the greater of 2mV or offset voltage)
    If this has only been tested with one sample, try a 2nd sample.