OPA857EVM-978: Setting the Module Into Test Mode and Frequency Limits

UPDATE: I have read further into the datasheet and found the pins responsible for the TEST_SD, they're located in the middle of the board with the pins and jumps on them. Setting them is simply about short circuiting the pins to ones next to each other as per the datasheet specifications.

I have a follow up question about biasing the circuit in the Test_In SMA connector. The diagram says to bias the Test_In with a DC bias from 2.3 to 2.4 to determine V_IN1 and V_IN2, this is then used to calculate the DC bias needed. However, there is also an AC connection in the diagram and I'm wondering WHEN we connect this AC signal - after we have used the DC bias to establish V_IN1 and V_IN2?

Regards,

James

Okay I am going to summarise my questions here:

1)

Where is the connection for Test_IN and IN? I cannot find the IN anywhere in the schematic except on diagrams with a C_diode in parallel?

What's the difference between the P1 input, VCC, and V_s?

2)

How can I put the module into test mode?

Do I set the jumper on J5 to the top two pins which sets the VCC input (V_s) directly to Test_SD then connect P1 to 3.3V thereby setting VCC to 3.3V?

After do I then use the SMA connection for Test_IN for DC biasing from 2.3 to 2.4, making sure the J4 jumper is disconnected?

Then measure the output of both J2 and J3 (The two SMA plugs) to make sure they match the 1.83V and 1.33V respectively to find V_IN1 and V_IN2?

3) Once I have the V_IN1 and V_IN2, would I set up the circuit as shown in Figure 3 to begin test mode?

4)

How would one relate the voltage input signal from the test mode to measure the frequency response? No guidance is given on how to perform these tasks.

The more I read this datasheet the more confused I become.