Compiler/TLV172: Hello, I have a some question what Tina simulation problem.

Hi Seungmin,

you are violating the common mode input voltage range of OPAmp. See section 7.7 of datasheet of TLV172. You must stay 2V away from the positive supply rail.

Kai

Seungmin,

The model will not work that close to the positive rail. However the actual device will operate up to the positive rail at reduced performance and reduced test coverage.   

See section 8.4.1 Common-Mode Voltage Range in the data sheet for this text and a table of typical performance. No limits specified and parameters may not be tested. So it is best to keep mode mode 2V below positive rail.

The input common-mode voltage range of the TLVx172 device extends 100 mV below the negative rail and within 2 V of the top rail for normal operation. This device can operate with full rail-to-rail input 100 mV beyond the top rail, but with reduced performance within 2 V of the top rail. Table 2 lists the typical performances in this range. 

See data sheet for table 2.

within 2 V of the top rail for normal operation.This device can operate with full rail-to-rail input 100 mV beyond the top rail, but with reduced performance within2 V of the top rail. Table 2 lists the typical performances in this range.Table 2. Typical Performance for Common-Mode Voltages Within 2 V of the Positive SupplyPARAMETER MIN TYP MAX UNITInput common-mode voltage (V+) – 2 (V+) + 0.1 VOffset voltage 7 mVOffset voltage vs temperature 12 ìV/°CCommon-mode rejection 65 dBOpen-loop gain 60 dBGain-bandwidth product 0.3 MHzSlew rate 0.3 V/ìs

Kai,

Well said. Offset can be quite high which is the main reason that the model aggressively discourages using the upper range. In some cases this could be acceptable. For a 36V unity gain signal, 50mV error at the top wouldn't be so bad. It's better than a phase reversal. 

The TLV172 is phase reversal protected and not truly rail to rail input (compared to RRI parts that do a better job).