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TLV2772A-EP: Input characteristics

Part Number: TLV2772A-EP
Other Parts Discussed in Thread: TLV2772

Hello.
I have several questions regarding the datasheet/specifications for the TLV2772 opamp.

All question apply to a simple voltage follower configuration (IN- tied directly to OUT)
1) What would happen when VDD = 3.3V and IN+ = 6V (with a maximum current on IN+ of 4uA)?  Does that potentially damamge the part, even though we're below the maximum VCC of 7V?
2) Similar question, but what if VDD was disabled (i.e. set to 0V) and we had IN+ of 2.5V (with a maximum current on IN+ of <2uA)?  Would that also potentially cause damage?
3) Is the common mode input voltage limit actually VDD - 1.3V?  The datasheet was a little confusing with the plus and minus signs.  What are the consequences of exceeding that, say with VDD = 3.2 and a CM input of 2.5V?

Thanks,
John

  • Hello John,

    The data sheet isn't clear so some lab data may need to be taken. 'Generally' in next sentences refer to most op amps.

    In general 4uA never hurts anything other than gate oxide and none of the situations described would likely do that.

    Violating input common mode generally causes an output that may be either at VOH or at regulated to the upper common mode (because the amp want to go to VOL) 

    Even with some lab data, operation outside of data sheet specifications is the customer's assumed risk.

  • Hi John,

    input voltages exceeding the supply voltage are never a good idea, unless the datasheet explicitely allows this condition, because latch-up can occur.

    Kai

  • John,

    I measured a sample device of TLV2772 and this should also apply to TLV2272-EP

    1) At 4uA then input would be less 4V and no damage is expected.

    2) At 2uA then input would be less 1V and no damage is expected.

    3) My sample worked unity gain from 0V to VCC. This is not recommend because not supported by data sheet.  

    The absolute maximum rating mentions input current of 4mA. My sample worked rail to rail input but consider this just phase reversal protection. Try to stay within the data sheet common mode range to reduce design risk. Above the recommended common mode range, device performance will degrade.