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OPA699: 10MHz signal Differential amplifier with G+15 : Reg Biasing and integration

Selvakumar Ramasamy
Prodigy 40 points
Part Number: OPA699

Dear TI Team,

In my application circuit should convert LVDS SPI (10MHZ) signal to single ended signal with variable High and Low voltage levels. Attached is the circuit for your reference. Below are some of my questions.

1. Since the LVDS requires an 100Ohm termination should the SPI_SI+ and SPI_SI- line to have Buffer after the termination resistor R5?

2. I intend to use a gain of +15 in order to have at least 3.3V in worst case conditions of LVDS voltage. i.e. 250mVx15. Is biasing resistor values ok?

3. VH and VL limits are changeable in run time depending on the test cases. Is R7 and R8 placement is OK or this may not be required at all?

4.I have not placed any load/line resistor or capacitor on OPA699 output. any suggestion here?

Thank you.SPI_Differential amplifier with voltage limiting.pdf

  • 0
    Guru 48395 points

    Without getting into too much detail, you would need to consider the input impedance looking into each side of the op amp diff amp. On the V+ input that is the divider network load - on the inverting side it is an active impedance since the signal on the V- node following the V+ input is related to the signal into the Rg element.