Hi team,
My customer asks below questions, could you support for those?
1) Is there supply sequence/restriction for turn-on VDD1 and VDD2?
2) How long will it take for VOUTP/VOUTN getting settled after turn_on VDD2?
Thanks and best regards,
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Hi team,
My customer asks below questions, could you support for those?
1) Is there supply sequence/restriction for turn-on VDD1 and VDD2?
2) How long will it take for VOUTP/VOUTN getting settled after turn_on VDD2?
Thanks and best regards,
Hi Nobuo,
There is no power supply sequencing requirement for the AMC1211-Q1. For the settling time, please refer to the tAB spec in section 6.10 (page 10) of the datasheet.
Hi Tom,
Thanks for the prompt support.
May I confirm about settling time?
TEST CONDITIONS of tAS, it says " VDD1 step to 3.0 V with VDD2 ≥ 3.0 V, to VOUTP, VOUTN valid, 0.1% settling".
It looks the condition "VDD2 being already supplied at > 3.0V, then VDD1 turned on".
Will it be the also valid for the condition "VDD1 being already supplied, then VDD2 turned on"?
Best regards,
Nobuo
Hi Nobuo,
Yes - I believe that time should also apply to VDD2 as well, at least the MAX number - typical might be a few uS more. If you take a look at the Functional Block Diagram in section 7.2 (page 18), both VDD1 and VDD2 perform some critical functions. On the VDD1 side, you power up the reference while on the VDD2 side you have an oscillator that drives data across the isolation barrier. The bulk of the startup cycle is in getting data through the 4th order active filter