Hi, Just checking about the filter requirement on the output- the signal out has just has the same frequency components as the input, so if it was a DC to 8KHz signal, that would set the filter pole?
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Hi, Just checking about the filter requirement on the output- the signal out has just has the same frequency components as the input, so if it was a DC to 8KHz signal, that would set the filter pole?
Hi ajayt,
What type of ADC is the signal ultimately sampled by?
We typically recommend setting the cutoff point to be at least a decade past the signal frequency as attenuation begins to happens long before the -3db point. For SAR ADCs, there are requirements for sizing the charge bucket capacitor. For delta-sigma ADCs, there is the modulator frequency to consider, where the cutoff should be at least a decade below the modulator frequency.
This TI Precision labs video series may help: training.ti.com/ti-precision-labs-adcs-refine-rfilt-and-cfilt-values