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LMV761: LMV761 Output jitter issues

Part Number: LMV761

Hello,

I am working on a design that also includes an LMV761 part, powered by a 3.3V (and the SD pin tied to the same potential). On the non-inverting input I have a DC voltage that comes from the output of an opamp and on the inverting one I have a reference triangle signal (generated in a microcontroller), rising from 0V, no offset. I did some tests with this circuit and found out jitter on the output of the comparator for a certain frequency of the triangle - 2.24 kHz. Also checked with some other higher frequencies and jitter disappeared. 

Might useful to mention that Vdd is decoupled by 10 uF parallel with 100 nF.

What may be happening here?

Many thanks in advance for any suggestions, ideas!

Matei

  • Hello Matei,

    If you get  'jitter" in a certain range of frequencies, this usually points to some sort of system resonance in either the supply, grounds or output trace. Problems like this are usually layout related.

    The LMV761 has fast output rise/fall times (2 ns), so it must be treated as a high-speed digital device, with all the precautions you would take for a 500MHz digital device. Tight layout. good supply bypassing, solid grounds, short traces..the works.

    Try adding a 1000pF cap DIRECTLY between the V+ and V- pins. If you are driving a long output trace (>10cm), then add a 10 to 50 ohm series resistor at the output to help dampen any trace reflections.

    And what are the input voltages? The input range is only 0 to 2.1V on a 3.3V supply. Make sure none of the inputs, including any "reflections", exceed these limits.

    Can you provide a schematic?

  • Hello Paul,

    Thank you very much for your comments!

    The V+ has a maximum of 1.4 V or 1.5 V and the triangle has a peak value of 3.3 V, so it seems I am exceeding here with the triangle, right? Need to decrease the triangle.

    Besides that, please find attached a snip with the layout area of the comparator, I tried to point out all the elements here, pretend there are jumpers for the 2-pin headers here.

    This is a 2 layers design, so underneath there are only corresponding ground planes.

    Thank you! Kind regards!

    Matei

  • Hi Matei,

    a splitted ground plane is not good at all here, because the ground return currents of high frequency components of signals have to travel a way too long path back to the source. This will result in ringing and resonances, right what you have observed :-)

    One remedy is to insert series resistors in the signal paths. Try 100...1000R. This will at least dampen the ringing to some amount. But a better approach is to use only ONE solid ground plane. Try to move the analog components and digital components to sperate areas where they do not interfere with each other. But use only one solid ground plane. And don't forget the series resistors in the signal lines. They do not only prevent ringing and resonances but also limit the current spikes into stray capacitances during the edges of fast signals. This helps to keep the signal ground clean.

    Supply voltage filters like RC- and RLC-filters for the digital and analog chips can also dramatically help to keep the signal ground clean. This is of special importance in accurate mixed analog digital designs.

    Kai

  • Thank you for your support, Kai.

    Regards,

    Joe

  • Hello Kai,

    Thank you very much for your suggestions!

    As a matter of fact, there is already a board based on the layout screenshot I showed so there is not much I can do right now to correct. I totally agree with the use of only one GND plane, it was clearly a mistake. I will change it in the next revision. But I could add series resistance on the comparator output and the triangle input, as you suggested.

    Another thing to mention would be the fact that the triangle is generated from a DAC and due to resolution the small steps of the triangle rise and fall could be visible (only 12 bits) to some extent and maybe this could lead to parasitic switches of the comp out. Would this be a valid theory?

    Thank you! Kind regards!

    Matei

  • Hi Matei,

    I am looking into an answer for your DAC question. I hope you will get a response by end of business Wednesday 11/18.

    Regards,

    Joe

  • Hi Matei,

    for a simple test you can join the two ground planes together by the help of some wire connections, every centimeter or so :-)

    Best do it on both sides of the printed circuit board.

    Kai

  • Thank you for your input Kai.

    Matei,

    I am still looking for an answer to your question. In the meantime, I recommend trying Kai's suggestion.

    Regards,

    Joe

  • Thank you Kai, Joe! :)

    I will certainly do that. 

    Looking forward to hearing an opinion, would be interesting to see if the DAC, with its resolution (12 bits, 3.3V reference) can cause some jitter, instability at the comp out.

    Kind regards!

    Matei

  • Hi Matei,

    it's difficult to answer this question without knowing the schematic. Having said this, it's well known that an ADC or DAC within a control loop showing a monotonicity error of more than 1LSB can even cause osillation :-)

    Kai

  • Thank you for your support Kai.

    Matei, I also think that your question is better answered if the schematic is known. I recommend simulating your circuit to better predict if the DAC will impact your comparator output.

    Regards,

    Joe

  • Matei

    There has been no additional input on this post, so it will be closed.  If you need further support, feel free to reply or open a new post.

    Thanks

    Chuck

  • Thank you! 

    This is alright for the moment.

    Kind regards!

    Matei