Hi Xaver,
Thomas has looked into the questions for another customer, here is what he has to said.
I looked over AFE032 datasheet, here is what it is described in IFLAG timing go the flag status goes into the current limit mode. AFE032 uses the same PA internally.
The DAC_CLK frequency range is between 5-40MHz. The IFLAG over current flag interrupt is asserted approx. 410usec to 3.3msec based on AFE032. AFE032 has many more digital blocks than OPA564 design. This is another timing delay reference data FYI.
If you have additional questions, please let us know.
Best,
Raymond
