Other Parts Discussed in Thread: TLV9062, TLV9052
Hello expert,
I have questions for TLV9152S.
First, I'd like to confirm about actual logic of shutdown pin.
In datasheet's pin function description said it is active-high shutdown pin.
However, the figured of top view of package is assigned \SHDN for pin 2/3. I think the meaning of this is active-low logic pin.
I think it is just typo but would you tell me which logic is correct?
Second, TI has the device which are pin to pin combative, similar performance device as TLV9052. TLV9062, etc...
However these device's shutdown pin's logic is active-low.
Then, would you tell me why three is different logic type device on similar devices?
I'm looking forward to hearing back from you.
Best regards,
Kazuki Kuramochi
